lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAL_JsqJHov0AcwHprU8wtjH4uX5QBYKsCVVsDqhEy9vSMGZPYQ@mail.gmail.com>
Date:	Wed, 21 Oct 2015 20:34:11 -0500
From:	Rob Herring <robh+dt@...nel.org>
To:	Caesar Wang <wxt@...k-chips.com>
Cc:	Heiko Stuebner <heiko@...ech.de>,
	Dmitry Torokhov <dmitry.torokhov@...il.com>,
	Doug Anderson <dianders@...omium.org>,
	Eduardo Valentin <edubezval@...il.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
	Kumar Gala <galak@...eaurora.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	linux-rockchip@...ts.infradead.org,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Pawel Moll <pawel.moll@....com>,
	Zhang Rui <rui.zhang@...el.com>,
	Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH v2 1/2] dt-bindings: Add the "init" pinctrl in this document

On Wed, Oct 21, 2015 at 8:25 PM, Caesar Wang <wxt@...k-chips.com> wrote:
> The "init" pinctrl is defined we'll set
> pinctrl to this state before probe and then "default" after probe.
>
> Add the "init" pinctrl as the OTP gpio state, since we need switch
> the pin to gpio state before the TSADC controller is reset.
>
> As I know, the TSADC controller is reset, the tshut polarity will be
> a *low* signal in a short period of time for some devices.
>
> Says:
> The TSADC get the temperature on rockchip thermal.
>
> If T(current temperature) < (setting temperature), the OTP output the
> *high* signal.
> If T(current temperature) > (setting temperature), the OTP output the
> *low* Signal.
>
> In some cases, the OTP pin is connected to the PMIC, maybe the
> PMIC can accept the reset response time to avoid this issue.
>
> In other words, the system will be always reboot if we make the
> OTP pin is connected the others IC to control the power.
>
> Signed-off-by: Caesar Wang <wxt@...k-chips.com>
> Reviewed-by: Douglas Anderson <dianders@...omium.org>
> ---
>
> Changes in v2:
>   - As the Rob comments, add the 'init' pinctrl more decription in document.

Where?

>   - fix the subject to make more obvious in PATCH[1/2]
> Series-changes: 1
>   - As the Doug comments, add the 'init' property to sync document.
>
> Changes in v1: None
>
>  Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> index ef802de..28e84f7 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> @@ -27,8 +27,9 @@ tsadc: tsadc@...80000 {
>         clock-names = "tsadc", "apb_pclk";
>         resets = <&cru SRST_TSADC>;
>         reset-names = "tsadc-apb";
> -       pinctrl-names = "default";
> -       pinctrl-0 = <&otp_out>;
> +       pinctrl-names = "init", "default";
> +       pinctrl-0 = <&otp_gpio>;
> +       pinctrl-1 = <&otp_out>;
>         #thermal-sensor-cells = <1>;
>         rockchip,hw-tshut-temp = <95000>;
>         rockchip,hw-tshut-mode = <0>;
> --
> 1.9.1
>
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists