lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <562B8E79.6010701@linaro.org>
Date:	Sat, 24 Oct 2015 15:58:17 +0200
From:	Tomasz Nowicki <tomasz.nowicki@...aro.org>
To:	Hanjun Guo <guohanjun@...wei.com>,
	Tomasz Nowicki <tn@...ihalf.com>, marc.zyngier@....com,
	tglx@...utronix.de, jason@...edaemon.net, rjw@...ysocki.net,
	lorenzo.pieralisi@....com, robert.richter@...iumnetworks.com
Cc:	will.deacon@....com, Catalin.Marinas@....com,
	hanjun.guo@...aro.org, graeme.gregory@...aro.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	linux-acpi@...r.kernel.org, ddaney.cavm@...il.com,
	Suravee.Suthikulpanit@....com
Subject: Re: [PATCH V1 10/10] acpi, gicv3, its: Use MADT ITS subtable to do
 PCI/MSI domain initialization.

On 10/24/2015 12:20 PM, Hanjun Guo wrote:
> On 2015/10/15 22:05, Tomasz Nowicki wrote:
>> After refactoring DT code, we let ACPI to build ITS PCI MSI domain
>> and do requester ID to device ID translation using IORT table.
>>
>> We have now full PCI MSI domain stack, thus we can enable ITS initialization
>> from GICv3 core driver for ACPI scenario.
>>
>> Signed-off-by: Tomasz Nowicki <tn@...ihalf.com>
>> ---
>>   drivers/irqchip/irq-gic-v3-its-pci-msi.c | 48 ++++++++++++++++++++++++++++++--
>>   drivers/irqchip/irq-gic-v3.c             |  3 +-
>>   2 files changed, 47 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c b/drivers/irqchip/irq-gic-v3-its-pci-msi.c
>> index cfd35da..09ae2d8 100644
>> --- a/drivers/irqchip/irq-gic-v3-its-pci-msi.c
>> +++ b/drivers/irqchip/irq-gic-v3-its-pci-msi.c
>> @@ -15,6 +15,8 @@
>>    * along with this program.  If not, see <http://www.gnu.org/licenses/>.
>>    */
>>
>> +#include <linux/acpi.h>
>> +#include <linux/iort.h>
>>   #include <linux/msi.h>
>>   #include <linux/of.h>
>>   #include <linux/of_irq.h>
>> @@ -59,8 +61,10 @@ static int its_pci_msi_vec_count(struct pci_dev *pdev)
>>   static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data)
>>   {
>>   	struct its_pci_alias *dev_alias = data;
>> +	u32 dev_id;
>>
>> -	dev_alias->dev_id = alias;
>> +	dev_alias->dev_id = iort_find_pci_id(pdev, alias, &dev_id) == 0 ?
>> +								dev_id : alias;
>
> Hi tomasz, I think we need to re work this patch on top of tip/irq/core
> which has support for "msi-map" and "mai-parent" property support.
>

Indeed, I will rebase after some more comments related to other patches 
in this series.

Tomasz
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ