lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-ID: <CAOMZO5AAr30RM7dE-0BEZGH3Nw1j-QpM+qv2WCyyfK4ATrh=VA@mail.gmail.com> Date: Sat, 24 Oct 2015 13:47:09 -0200 From: Fabio Estevam <festevam@...il.com> To: Yuan Yao <yao.yuan@...escale.com> Cc: David Woodhouse <dwmw2@...radead.org>, Brian Norris <computersforpeace@...il.com>, "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>, linux-kernel <linux-kernel@...r.kernel.org>, Han Xu <b45815@...escale.com> Subject: Re: [PATCH] mtd: spi-nor: fsl-quadspi: add big-endian support On Fri, Oct 23, 2015 at 5:53 AM, Yuan Yao <yao.yuan@...escale.com> wrote: > /* > + * R/W functions for big- or little-endian registers: > + * The qSPI controller's endian is independent of the CPU core's endian. > + * So far, although the CPU core is little-endian but the qSPI have two > + * versions for big-endian and little-endian. > + */ > +static void qspi_writel(struct fsl_qspi *q, u32 val, void __iomem *addr) > +{ > + if (q->big_endian) > + iowrite32be(val, addr); > + else > + iowrite32(val, addr); > +} I suggest you to implement regmap support for this driver instead. Take a look at drivers/watchdog/imx2_wdt.c for a reference. Then you only need to pass 'big-endian' as a property for the qspi in the .dtsi file and regmap core will take care of endianness. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists