linux-kernel - [PATCH] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC

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Message-ID: <1445650280-9966-1-git-send-email-German.Rivera@freescale.com>
Date:	Fri, 23 Oct 2015 20:31:20 -0500
From:	"J. German Rivera" <German.Rivera@...escale.com>
To:	<robh+dt@...nel.org>, <mark.rutland@....com>,
	<devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>
CC:	<bhupesh.sharma@...escale.com>, <stuart.yoder@...escale.com>,
	<leoli@...escale.com>,
	"J. German Rivera" <German.Rivera@...escale.com>
Subject: [PATCH] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC

Added sys-reboot node to the FSL's LS2085A SoC DT to leverage
the ARM-generic reboot mechanism for this SoC. This mechanism
is enabled through CONFIG_POWER_RESET_SYSCON.

Signed-off-by: J. German Rivera <German.Rivera@...escale.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
index e281ceb..6f82163 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
@@ -131,6 +131,18 @@
 		interrupts = <1 9 0x4>;
 	};
 
+	rst_ccsr: rstccsr@...0000 {
+	        compatible = "syscon";
+		reg = <0x0 0x1E60000 0x0 0x10000>;
+	};
+
+	reboot@...24000 {
+		compatible ="syscon-reboot";
+		regmap = <&rst_ccsr>;
+		offset = <0x0>;
+		mask = <0x2>;
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
-- 
2.3.3

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