lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CACRpkdbO8K+rckMS8qY=YMBXCREdt_uS-pwqAGWj9NfG9gS80w@mail.gmail.com>
Date:	Tue, 27 Oct 2015 13:29:54 +0100
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc:	Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH 1/3] pinctrl: intel: Add support for multiple GPIO chips
 sharing the interrupt

On Wed, Oct 21, 2015 at 12:08 PM, Mika Westerberg
<mika.westerberg@...ux.intel.com> wrote:

> On Intel Broxton the GPIO hardware consists of several chips that all share
> the parent interrupt. It is not possible to handle this by setting chained
> handler for each chip (as they will overwrite each other).
>
> To overcome this we need to request the interrupt using devm_request_irq()
> and pass IRQF_SHARED with the flags.
>
> Signed-off-by: Mika Westerberg <mika.westerberg@...ux.intel.com>

Makes perfect sense. Patch applied.

Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ