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Message-ID: <562F9310.7000900@huawei.com>
Date: Tue, 27 Oct 2015 15:06:56 +0000
From: John Garry <john.garry@...wei.com>
To: zhangfei <zhangfei.gao@...aro.org>,
Mark Rutland <mark.rutland@....com>
CC: <JBottomley@...n.com>, <robh+dt@...nel.org>, <pawel.moll@....com>,
<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
<arnd@...db.de>, <linux-scsi@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linuxarm@...wei.com>, <john.garry2@...l.dcu.ie>, <hare@...e.de>,
<xuwei5@...ilicon.com>
Subject: Re: [PATCH v2 02/32] devicetree: bindings: scsi: HiSi SAS
>>> The syscon block is a general subsystem control block, and it is not
>>> specifically only for controlling reset and enabling clocks (other
>>> functions include serdes control, for example). It is also shared
>>> with other peripherals.
>>>
>>> So we can remove the ctrl-reg property (since it is not part of the
>>> SAS controller), and add the relevant syscon register offsets to the
>>> "hisilicon,sas-syscon" property, like this:
>>> hisilicon,sas-syscon = <&sas_ctrl0 0xa60 0x33c 0x5a30 0xa64 0x338>;
>>>
>>> Ok?
>>
>> It would be better to have each offset in a separate property.
>>
> These register are not used for different purpose.
> Instead, they are all used for one purpose, reset the sas controller;
> Though a bit complicated, the silicon has special requirement here.
>
> So still prefer using the original method,
> ctrl-reg = <0xa60 0x33c 0x5a30 0xa64 0x338>;
> Since we can simply use of_property_read_u32_array.
>
We can actually remove the deassert and clock enable properties as they
are always at a fixed offset from their respective assert/clk disable
partner register.
> Thanks
>
>
> .
>
thanks,
John
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