linux-kernel - RE: [PATCH v3 7/7] PCI: hv: New paravirtual PCI front-end for Hyper-V VMs

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Message-ID: <DM2PR0301MB1232E93FC2DD8C26EEDBB69AAB220@DM2PR0301MB1232.namprd03.prod.outlook.com>
Date:	Tue, 27 Oct 2015 20:38:44 +0000
From:	Jake Oshins <jakeo@...rosoft.com>
To:	Jiang Liu <jiang.liu@...ux.intel.com>,
	"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
	KY Srinivasan <kys@...rosoft.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devel@...uxdriverproject.org" <devel@...uxdriverproject.org>,
	"olaf@...fle.de" <olaf@...fle.de>,
	"apw@...onical.com" <apw@...onical.com>,
	"vkuznets@...hat.com" <vkuznets@...hat.com>,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	Haiyang Zhang <haiyangz@...rosoft.com>,
	"marc.zyngier@....com" <marc.zyngier@....com>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>
Subject: RE: [PATCH v3 7/7] PCI: hv: New paravirtual PCI front-end for Hyper-V
 VMs

> -----Original Message-----
> From: Jiang Liu [mailto:jiang.liu@...ux.intel.com]
> Sent: Tuesday, October 27, 2015 12:11 AM
> To: Jake Oshins <jakeo@...rosoft.com>; gregkh@...uxfoundation.org; KY
> Srinivasan <kys@...rosoft.com>; linux-kernel@...r.kernel.org;
> devel@...uxdriverproject.org; olaf@...fle.de; apw@...onical.com;
> vkuznets@...hat.com; tglx@...utronix.de; Haiyang Zhang
> <haiyangz@...rosoft.com>; marc.zyngier@....com;
> bhelgaas@...gle.com; linux-pci@...r.kernel.org
> Subject: Re: [PATCH v3 7/7] PCI: hv: New paravirtual PCI front-end for Hyper-
> V VMs
> 
> On 2015/10/27 7:15, jakeo@...rosoft.com wrote:
> > From: Jake Oshins <jakeo@...rosoft.com>
> >
(snip)
> > +/**
> > + * hv_pcie_init_irq_domain() - Initialize IRQ domain
> > + * @hbus:	The root PCI bus
> > + *
> > + * Return: '0' on success and error value on failure
> > + */
> > +static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
> > +{
> > +	hbus->msi_info.chip = &hv_msi_irq_chip;
> > +	hbus->msi_info.chip_data = hbus;
> > +	hbus->msi_info.ops = &hv_msi_ops;
> > +	hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
> > +		MSI_FLAG_USE_DEF_CHIP_OPS |
> MSI_FLAG_MULTI_PCI_MSI |
> > +		MSI_FLAG_PCI_MSIX);
> When interrupt remapping is not supported, x86 vector allocator
> can't support multiple MSI because it can't allocate continuous
> vectors yet. So please confirm whether we could enable
> MSI_FLAG_MULTI_PCI_MSI for HV.
> 

We can actually handle the remapping in the hypervisor.  I'll add a comment to that effect.

> > +	hbus->msi_info.handler = handle_edge_irq;
> > +	hbus->msi_info.handler_name = "edge";
> > +	hbus->msi_info.data = hbus;
> How about using following pattern so we could avoid exporting
> too many interfaces?
> 
> struct irq_domain *parent_domain = NULL;
> hbus->msi_info.chip = &hv_msi_irq_chip;
> hbus->msi_info.ops = &hv_msi_ops;
> // Let arch code to fill in default ops for chip and domain
> x86_setup_default_msi_irqdomian_info(&hbus->msi_info,
> &parent_domain);
> // Override default ops if not applicable
> hbus->irq_domain = pci_msi_create_irq_domain(hbus->fwnode,
> 					     &hbus->msi_info,
> 					     parent_domain);
> 

I understand your point here, but I'm having trouble making it play out.  When I look at this, the only functions or structures which are supplied straight from exports (in my proposed patches) are irq_chip_ack_parent(), pci_msi_prepare() and x86_vector_domain.  The other exports either already exist for other reasons or they're needed within functions that I need to supply.  If you feel strongly that adding a new function to avoid exporting these is the right way to go, I'll do it, but I want to confirm that first.

Thanks,
Jake Oshins
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