linux-kernel - Re: [PATCH v3 2/2] arm64: dts: Add BRCM IPROC NAND DT node for NS2

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Message-ID: <20151028001920.GY13239@google.com>
Date:	Tue, 27 Oct 2015 17:19:20 -0700
From:	Brian Norris <computersforpeace@...il.com>
To:	Anup Patel <anup.patel@...adcom.com>
Cc:	David Woodhouse <dwmw2@...radead.org>,
	Linux MTD <linux-mtd@...ts.infradead.org>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	Sudeep Holla <sudeep.holla@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>, Ray Jui <rjui@...adcom.com>,
	Scott Branden <sbranden@...adcom.com>,
	Florian Fainelli <f.fainelli@...il.com>,
	Pramod KUMAR <pramodku@...adcom.com>,
	Vikram Prakash <vikramp@...adcom.com>,
	Sandeep Tripathy <tripathy@...adcom.com>,
	Linux ARM Kernel <linux-arm-kernel@...ts.infradead.org>,
	Device Tree <devicetree@...r.kernel.org>,
	Linux Kernel <linux-kernel@...r.kernel.org>,
	BCM Kernel Feedback <bcm-kernel-feedback-list@...adcom.com>
Subject: Re: [PATCH v3 2/2] arm64: dts: Add BRCM IPROC NAND DT node for NS2

On Fri, Oct 23, 2015 at 10:46:13AM +0530, Anup Patel wrote:
> The NAND controller on NS2 SoC is compatible with existing
> BRCM IPROC NAND driver so let's enable it in NS2 DT and
> NS2 SVK DT.
> 
> This patch also fixes use of node labels in ns2-svk.dts.
> 
> Signed-off-by: Anup Patel <anup.patel@...adcom.com>
> Reviewed-by: Ray Jui <rjui@...adcom.com>
> Reviewed-by: Scott Branden <sbranden@...adcom.com>
> ---
>  arch/arm64/boot/dts/broadcom/ns2-svk.dts | 30 ++++++++++++++++++++----------
>  arch/arm64/boot/dts/broadcom/ns2.dtsi    | 14 ++++++++++++++
>  2 files changed, 34 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> index e5950d5..6bb3d4d 100644
> --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> @@ -50,18 +50,28 @@
>  		device_type = "memory";
>  		reg = <0x000000000 0x80000000 0x00000000 0x40000000>;
>  	};
> +};
>  
> -	soc: soc {
> -		i2c0: i2c@...80000 {
> -			status = "ok";
> -		};
> +&i2c0 {
> +	status = "ok";
> +};
>  
> -		i2c1: i2c@...b0000 {
> -			status = "ok";
> -		};
> +&i2c1 {
> +	status = "ok";
> +};
> +
> +&uart3 {
> +	status = "ok";
> +};
>  
> -		uart3: serial@...30000 {
> -			status = "ok";
> -		};
> +&nand {
> +	nandcs@0 {
> +		compatible = "brcm,nandcs";
> +		reg = <0>;
> +		nand-ecc-mode = "hw";
> +		nand-ecc-strength = <8>;
> +		nand-ecc-step-size = <512>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
>  	};
>  };
> diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> index f603277..9610822 100644
> --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> @@ -212,5 +212,19 @@
>  			compatible = "brcm,iproc-rng200";
>  			reg = <0x66220000 0x28>;
>  		};
> +
> +		nand: nand@...60000 {
> +			compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";

Technically, the binding says you should also have "brcm,brcmnand" as a
last resort. Otherwise (for the NAND parts):

Reviewed-by: Brian Norris <computersforpeace@...il.com>

> +			reg = <0x66460000 0x600>,
> +			      <0x67015408 0x600>,
> +			      <0x66460f00 0x20>;
> +			reg-names = "nand", "iproc-idm", "iproc-ext";
> +			interrupts = <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>;
> +
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			brcm,nand-has-wp;
> +		};
>  	};
>  };
> -- 
> 1.9.1
> 
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