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Message-ID: <CAAtXAHcaSZaKhYtVFbUEuO+boMh_PgUaOGVtjO_5MDkpcLcmWA@mail.gmail.com>
Date: Wed, 28 Oct 2015 08:37:51 -0700
From: Moritz Fischer <moritz.fischer@...us.com>
To: Josh Cartwright <joshc@...com>
Cc: Alan Tull <atull@...nsource.altera.com>,
Greg KH <gregkh@...uxfoundation.org>,
Michal Simek <monstr@...str.eu>,
Michal Simek <michal.simek@...inx.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Jonathan Corbet <corbet@....net>, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
Pantelis Antoniou <pantelis.antoniou@...sulko.com>,
Alan Tull <delicious.quinoa@...il.com>,
"dinguyen@...nsource.altera.com" <dinguyen@...nsource.altera.com>
Subject: Re: [PATCH v12 3/6] fpga: add simple-fpga-bus
On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright <joshc@...com> wrote:
> On Tue, Oct 27, 2015 at 05:09:12PM -0500, atull@...nsource.altera.com wrote:
>> From: Alan Tull <atull@...nsource.altera.com>
>>
>> The Simple FPGA bus uses the FPGA Manager Framework and the
>> FPGA Bridge Framework to provide a manufactorer-agnostic
>> interface for reprogramming FPGAs that is Device Tree
>> Overlays-based.
>
> Do you intend the "simple-fpga-bus" to be used on Zynq as well? The
> whole concept of the socfpga's "FPGA Bridge" doesn't map to the Zynq at
> all, from what I can tell.
For Zynq the zynq-fpga driver takes care of the level shifters on full
reconfiguration,
and doesn't for partial reconfiguration. Now depending on which parts
of the fabric
are partial reconfigured (say AXI masters), one might run into issues
with a setup like that.
My first plan was to counter that by using zynq-reset to hold the
reset high during
reconfiguration of that part of the FPGA.
I'm happy to rethink that part and maybe redo the level shifters and
resets together in a bridge
driver under devicetree control gives finer grained control.
Cheers,
Moritz
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