lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Wed, 28 Oct 2015 10:34:46 -0500
From:	atull <atull@...nsource.altera.com>
To:	Moritz Fischer <moritz.fischer@...us.com>
CC:	Steffen Trumtrar <s.trumtrar@...gutronix.de>,
	Greg KH <gregkh@...uxfoundation.org>,
	Josh Cartwright <joshc@...com>,
	Michal Simek <monstr@...str.eu>,
	Michal Simek <michal.simek@...inx.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	"Kumar Gala" <galak@...eaurora.org>,
	Jonathan Corbet <corbet@....net>,
	<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
	<linux-doc@...r.kernel.org>,
	Pantelis Antoniou <pantelis.antoniou@...sulko.com>,
	Alan Tull <delicious.quinoa@...il.com>,
	"dinguyen@...nsource.altera.com" <dinguyen@...nsource.altera.com>
Subject: Re: [PATCH v12 2/6] fpga: add bindings document for simple fpga
 bus

On Wed, 28 Oct 2015, Moritz Fischer wrote:

> On Wed, Oct 28, 2015 at 7:53 AM, atull <atull@...nsource.altera.com> wrote:
> 
> >> > +A Simple FPGA Bus is a bus that handles configuring an FPGA and its bridges
> >> > +before populating the devices below its node.  All this happens when a device
> >> > +tree overlay is added to the live tree.  This document describes that device
> >> > +tree overlay.
> >> > +
> >>
> >> This is not really true, is it?
> >> The driver should work without applying the overlay, e.g. the bootloader
> >> might have already done it.
> >>
> >
> > Yes it's true.  I'm not clear what you are saying.  If the bootloader has
> > programmed the FPGA, the overlay can leave out the optional properties
> > and the FPGA won't get reprogrammed; the child devices will still get
> > added and probed.  So this handles both the case where you want to reprogram
> > the FPGA under Linux and where the FPGA was programmed by a bootloader.
> 
> I think what he means is that the document explicitly calls out the overlay,
> when in theory it also works without an overlay. While being the most 'natural'
> use-case, it is not the only one ;-)
> 
> Moritz
> 

Yes, I can just take out the two sentences that refer to overlays and just 
leave:

A Simple FPGA Bus is a bus that handles configuring an FPGA and its bridges
before populating the devices below its node.

Alan

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ