linux-kernel - Re: [PATCH 1/5] mtd: ofpart: grab device tree node directly from master device node

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Message-Id: <201510282138.20754.marex@denx.de>
Date:	Wed, 28 Oct 2015 21:38:20 +0100
From:	Marek Vasut <marex@...x.de>
To:	Boris Brezillon <boris.brezillon@...e-electrons.com>
Cc:	Brian Norris <computersforpeace@...il.com>,
	linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
	Scott Wood <scottwood@...escale.com>,
	Josh Wu <josh.wu@...el.com>,
	Robert Jarzmik <robert.jarzmik@...e.fr>,
	Kyungmin Park <kyungmin.park@...sung.com>,
	Han Xu <han.xu@...escale.com>,
	Huang Shijie <shijie.huang@....com>
Subject: Re: [PATCH 1/5] mtd: ofpart: grab device tree node directly from master device node

On Wednesday, October 28, 2015 at 05:32:15 PM, Boris Brezillon wrote:
> Hi Marek,

Hi Boris,

> On Wed, 28 Oct 2015 17:11:14 +0100
> 
> Marek Vasut <marex@...x.de> wrote:
> > On Wednesday, October 28, 2015 at 08:58:13 AM, Boris Brezillon wrote:
> > > Hi Brian,
> > 
> > Hi,
> > 
> > [...]
> > 
> > > > Are
> > > > there ever cases we want more than one (master) MTD per nand_chip? Or
> > > > vice versa?
> > > 
> > > Nope, I'd say that you always have a 1:1 relationship between a master
> > > MTD device and a NAND device.
> > 
> > Do some sorts of chipselects come into play here ? Ie. you can have one
> > master with multiple NAND chips connected to it.
> 
> Most NAND controllers support interacting with several chips (or
> dies in case your chip embeds several NAND dies), but I keep thinking
> each physical chip should have its own instance of nand_chip + mtd_info.
> If you want to have a single mtd device aggregating several chips you
> can use mtdconcat.

I agree.

> This leaves the multi-dies chip case, and IHMO we should represent those
> chips as a single entity, and I guess that's the purpose of the
> ->numchips field in nand_chip (if your chip embeds 2 dies with 2 CS
> lines, then ->numchips should be 2).

I'd expect this to be represented as two physical chips, no ?

> Anyway, I think the whole problem here is that most NAND drivers are
> mixing the concepts of NAND controller (the controller driving one or
> several NAND chips) and NAND chip (a chip connected to a NAND
> controller).
> The NAND controller should not be represented with a nand_chip
> instance, but with a nand_hw_control instance, which is rarely done
> except in a few drivers.

OK, understood.

> I sent an RFC a while ago [1] to clarify that, but didn't have time to
> post a new version.
> 
> Best Regards,
> 
> Boris
> 
> [1]http://thread.gmane.org/gmane.linux.drivers.mtd/57614/focus=58552

Best regards,
Marek Vasut
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