linux-kernel - [PATCH V6 1/3] Add DT bindings documentation for hi6220 SoC reset controller.

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Message-ID: <1446123303-91956-1-git-send-email-puck.chen@hisilicon.com>
Date:	Thu, 29 Oct 2015 20:55:01 +0800
From:	Chen Feng <puck.chen@...ilicon.com>
To:	<p.zabel@...gutronix.de>, <linux-kernel@...r.kernel.org>,
	<puck.chen@...yun.com>, <robh+dt@...nel.org>, <pawel.moll@....com>,
	<mark.rutland@....com>, <ijc+devicetree@...lion.org.uk>
Subject: [PATCH V6 1/3] Add DT bindings documentation for hi6220 SoC reset controller.

docs: dts: Added documentation for hi6220 Reset Controller

Signed-off-by: Chen Feng <puck.chen@...ilicon.com>
---
 .../bindings/reset/hisilicon,hi6220-reset.txt      | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt

diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
new file mode 100644
index 0000000..be06352
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
@@ -0,0 +1,32 @@
+Hisilicon System Reset Controller
+======================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+The reset controller registers are part of the system-ctl block on
+hi6220 SoC.
+
+Required properties:
+- compatible: may be "hisilicon,hi6220-sysctrl"
+- reg: should be register base and length as documented in the
+  datasheet
+- #reset-cells: 1, see below
+
+Example:
+sys_ctrl: sys_ctrl@...30000 {
+	compatible = "hisilicon,hi6220-sysctrl", "syscon";
+	reg = <0x0 0xf7030000 0x0 0x2000>;
+	#clock-cells = <1>;
+	#reset-cells = <1>;
+};
+
+Specifying reset lines connected to IP modules
+==============================================
+example:
+
+        uart1: uart1@..... {
+                ...
+                resets = <&sys_ctrl 0x305>;
+                ...
+        };
-- 
1.9.1

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