lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5633BCA4.1050400@codeaurora.org>
Date:	Fri, 30 Oct 2015 13:53:24 -0500
From:	Timur Tabi <timur@...eaurora.org>
To:	Fu Wei <fu.wei@...aro.org>
Cc:	Mark Rutland <mark.rutland@....com>,
	Linaro ACPI Mailman List <linaro-acpi@...ts.linaro.org>,
	linux-watchdog@...r.kernel.org, devicetree@...r.kernel.org,
	LKML <linux-kernel@...r.kernel.org>, linux-doc@...r.kernel.org,
	Wei Fu <tekkamanninja@...il.com>,
	Arnd Bergmann <arnd@...db.de>,
	Guenter Roeck <linux@...ck-us.net>,
	Vipul Gandhi <vgandhi@...eaurora.org>,
	Wim Van Sebroeck <wim@...ana.be>,
	Jon Masters <jcm@...hat.com>, Leo Duran <leo.duran@....com>,
	Jon Corbet <corbet@....net>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	Rafael Wysocki <rjw@...ysocki.net>,
	Dave Young <dyoung@...hat.com>,
	Pratyush Anand <panand@...hat.com>,
	Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>,
	Rob Herring <robherring2@...il.com>
Subject: Re: [PATCH v8 1/5] Documentation: add sbsa-gwdt driver documentation

On 10/30/2015 01:35 PM, Fu Wei wrote:
>> I think maybe Mark was asking why WS1 is optional, not the WS1
> My answer is for "why WS1 is optional"!
>
>> >interrupt.  Maybe you can reword the documentation to make is clear
>> >that
> I didn't say : "only the*interrupt*  for WS1 is optional."

WS1 itself is not optional.  The spec says that WS0 and WS1 are separate 
events, and doesn't saying anything about either being optional.  The 
*interrupt* for WS1, however, is optional.

Besides, what does the driver do with the WS1 interrupt?  If it's 
specified in the device tree, it appears to be ignored by the driver. 
And the ACPI table only allows for specifying ONE interrupt.  So how 
would the driver register a handler for WS1 on an ACPI system?

-- 
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ