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Date:	Fri, 30 Oct 2015 20:32:53 +0100
From:	Borislav Petkov <bp@...en8.de>
To:	Andy Lutomirski <luto@...capital.net>
Cc:	LKML <linux-kernel@...r.kernel.org>,
	Andy Lutomirski <luto@...nel.org>,
	"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...nel.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Peter Zijlstra <peterz@...radead.org>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [RFC PATCH] x86/cpu: Fix MSR value truncation issue

On Fri, Oct 30, 2015 at 12:26:42PM -0700, Andy Lutomirski wrote:
> Want to add that to the patch or make it another patch?

Yeah, I'll make another one as it is going to document why we're
explicitly ANDing with 0xffffffffull.

> Fair enough.  I suppose that this thing is a handful of separate
> fields as opposed to being just a number.

You mean MSR_STAR?

Just the two upper 16-bit values. The lower 32-bit are reserved on Intel
while on AMD they're "32-bit SYSCALL Target EIP", meaning that you can
use SYSCALL on 32-bit too.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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