linux-kernel - Re: [PATCH v4 0/5] mtd: pxa3xx

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Message-ID: <CAAEAJfDDxhiKyPAt+HY7HL4XJ5VZA87R2igA0EiO4FZyVL7wrQ@mail.gmail.com>
Date:	Mon, 2 Nov 2015 12:49:47 -0300
From:	Ezequiel Garcia <ezequiel@...guardiasur.com.ar>
To:	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Cc:	Antoine Tenart <antoine.tenart@...e-electrons.com>,
	zmxu@...vell.com, jszhang@...vell.com,
	Boris Brezillon <boris.brezillon@...e-electrons.com>,
	David Woodhouse <dwmw2@...radead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
	Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
	Gregory Clément 
	<gregory.clement@...e-electrons.com>,
	Brian Norris <computersforpeace@...il.com>,
	Robert Jarzmik <robert.jarzmik@...e.fr>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Subject: Re: [PATCH v4 0/5] mtd: pxa3xx_nand: rework the timing setup

On 22 October 2015 at 12:12, Thomas Petazzoni
<thomas.petazzoni@...e-electrons.com> wrote:
> Hello Antoine,
>
> On Wed, 21 Oct 2015 10:28:59 +0200, Antoine Tenart wrote:
>
>> Antoine Tenart (5):
>>   mtd: pxa3xx: prepare allowing compile test
>>   mtd: nand: allow compile test of MTD_NAND_PXA3xx
>>   mtd: pxa3xx_nand: add helpers to setup the timings
>>   mtd: pxa3xx_nand: rework flash detection and timing setup
>>   mtd: pxa3xx_nand: clean up the pxa3xx timings
>
> I tested your series on Armada 375 DB, which uses the same pxa3xx
> driver, but with the Armada 370 variant.
>
> With the current Device Tree which has nand,keep-config to keep the
> timing configuration from the bootloader, I don't see any problem, so
> there is no regression introduced by your series, at least on this
> platform.
>
> However, when I remove nand,keep-config to use the ONFI timings from
> the NAND, then things work fine (I can mount a UBIFS root filesystem),
> but there is a weird:
>
> pxa3xx-nand f10d0000.nand: Wait time out!!!
>
> After investigating a bit, the following steps occur:
>
>  * The timings are configured as ONFI mode 0
>  * Reset command is sent to the NAND (0xff), two times in a row.
>  * READID command is sent to the NAND (0x90), three times in a row.
>  * PARAM command is sent to the NAND (0xec) and it times out

This timeout happens because initial chunk_size is 512, but the PARAM
page read is now set to read  2048 (only on the NFCv2 controller variant).

I'll prepare a patchset soon.
-- 
Ezequiel García, VanguardiaSur
www.vanguardiasur.com.ar
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