linux-kernel - Re: [PATCH 4/4] locking: Introduce smp_cond

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Message-ID: <20151103011406.GB29027@linux.vnet.ibm.com>
Date:	Mon, 2 Nov 2015 17:14:06 -0800
From:	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
To:	Will Deacon <will.deacon@....com>
Cc:	Peter Zijlstra <peterz@...radead.org>, mingo@...nel.org,
	oleg@...hat.com, linux-kernel@...r.kernel.org,
	boqun.feng@...il.com, corbet@....net, mhocko@...nel.org,
	dhowells@...hat.com, torvalds@...ux-foundation.org
Subject: Re: [PATCH 4/4] locking: Introduce smp_cond_acquire()

On Mon, Nov 02, 2015 at 05:43:48PM +0000, Will Deacon wrote:
> On Mon, Nov 02, 2015 at 02:57:26PM +0100, Peter Zijlstra wrote:
> > On Mon, Nov 02, 2015 at 02:29:05PM +0100, Peter Zijlstra wrote:
> > 
> > > Note that while smp_cond_acquire() has an explicit
> > > smp_read_barrier_depends() for Alpha, neither sites it gets used in
> > > were actually buggy on Alpha for their lack of it. The first uses
> > > smp_rmb(), which on Alpha is a full barrier too and therefore serves
> > > its purpose. The second had an explicit full barrier.
> > 
> > > +/**
> > > + * smp_cond_acquire() - Spin wait for cond with ACQUIRE ordering
> > > + * @cond: boolean expression to wait for
> > > + *
> > > + * Equivalent to using smp_load_acquire() on the condition variable but employs
> > > + * the control dependency of the wait to reduce the barrier on many platforms.
> > > + *
> > > + * The control dependency provides a LOAD->STORE order, the additional RMB
> > > + * provides LOAD->LOAD order, together they provide LOAD->{LOAD,STORE} order,
> > > + * aka. ACQUIRE.
> > > + */
> > > +#define smp_cond_acquire(cond)	do {		\
> > > +	while (!(cond))				\
> > > +		cpu_relax();			\
> > > +	smp_read_barrier_depends(); /* ctrl */	\
> > > +	smp_rmb(); /* ctrl + rmb := acquire */	\
> > > +} while (0)
> > 
> > So per the above argument we could leave out the
> > smp_read_barrier_depends() for Alpha, although that would break
> > consistency with all the other control dependency primitives we have. It
> > would avoid issuing a double barrier.
> > 
> > Thoughts?
> 
> Do we even know that Alpha needs a barrier for control-dependencies in
> the first place?

You would ask that question when I am many thousands of miles from my
copy of the Alpha reference manual!  ;-)

There is explicit wording in that manual that says that no multi-variable
ordering is implied without explicit memory-barrier instructions.

							Thanx, Paul

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