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Message-ID: <5802577.H74A3Lg5B3@wuerfel>
Date:	Tue, 03 Nov 2015 16:59:28 +0100
From:	Arnd Bergmann <arnd@...db.de>
To:	Sinan Kaya <okaya@...eaurora.org>
Cc:	Tomasz Nowicki <tn@...ihalf.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
	bhelgaas@...gle.com, will.deacon@....com, catalin.marinas@....com,
	rjw@...ysocki.net, hanjun.guo@...aro.org,
	jiang.liu@...ux.intel.com, robert.richter@...iumnetworks.com,
	Narinder.Dhillon@...iumnetworks.com, ddaney@...iumnetworks.com,
	Liviu.Dudau@....com, tglx@...utronix.de, wangyijing@...wei.com,
	Suravee.Suthikulpanit@....com, msalter@...hat.com,
	linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-acpi@...r.kernel.org, linux-kernel@...r.kernel.org,
	linaro-acpi@...ts.linaro.org
Subject: Re: [PATCH V1 11/11] arm64, pci, acpi: Support for ACPI based PCI hostbridge init

On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
> 
> I don't see anywhere in the SBSA spec addendum that the PCI 
> configuration space section that unaligned accesses *MUST* be supported.
> 
> If this is required, please have this info added to the spec. I can work 
> with the designers for the next chip.
> 
> Unaligned access on the current hardware returns incomplete values or 
> can cause bus faults. The behavior is undefined.

Unaligned accesses are not allowed, but any PCI compliant device must
support aligned 1, 2 or 4 byte accesses on its configuration space,
though the byte-enable mechanism. In an ECAM host bridge, those are
mapped to load/store accesses from the CPU with the respective width
and natural alignment.

	Arnd
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