linux-kernel - [PATCH] x86/intel_cacheinfo: Fix LLC topology for AMD Fam17h systems

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Date:	Tue, 3 Nov 2015 13:15:56 -0600
From:	Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
To:	<tglx@...utronix.de>, <mingo@...hat.com>, <hpa@...or.com>,
	<bp@...e.de>
CC:	<x86@...nel.org>, <sudeep.holla@....com>,
	<akpm@...ux-foundation.org>, <geliangtang@....com>,
	<tj@...nel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH] x86/intel_cacheinfo: Fix LLC topology for AMD Fam17h systems

On AMD Fam17h systems, the last level cache is not resident in
Northbridge. Therefore, we cannot assign cpu_llc_id to same
value as Node ID (as we have been doing currently)

We should rather look at the ApicID bits of the core to provide
us the last level cache ID info. Doing that here.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
---
 arch/x86/kernel/cpu/intel_cacheinfo.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index e38d338..897a483 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -636,6 +636,9 @@ static int find_num_cache_leaves(struct cpuinfo_x86 *c)
 
 void init_amd_cacheinfo(struct cpuinfo_x86 *c)
 {
+	unsigned int cpu = c->cpu_index;
+	unsigned int apicid = c->apicid;
+	unsigned int socket_id, core_complex_id;
 
 	if (cpu_has_topoext) {
 		num_cache_leaves = find_num_cache_leaves(c);
@@ -645,6 +648,17 @@ void init_amd_cacheinfo(struct cpuinfo_x86 *c)
 		else
 			num_cache_leaves = 3;
 	}
+
+	/*
+	 * Fix percpu cpu_llc_id here as LLC topology is different
+	 * for Fam17h systems.
+	 */
+	 if (c->x86 != 0x17 || !cpuid_edx(0x80000006))
+		return;
+
+	socket_id = (apicid >> c->x86_coreid_bits) - 1;
+	core_complex_id = (apicid & ((1 << c->x86_coreid_bits) - 1)) >> 3;
+	per_cpu(cpu_llc_id, cpu) = (socket_id << 3) | core_complex_id;
 }
 
 unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)
-- 
2.6.1

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/