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Message-ID: <9870677.mbWe9PySGp@wuerfel>
Date: Tue, 03 Nov 2015 22:10:59 +0100
From: Arnd Bergmann <arnd@...db.de>
To: Sinan Kaya <okaya@...eaurora.org>
Cc: dmaengine@...r.kernel.org, timur@...eaurora.org,
cov@...eaurora.org, jcm@...hat.com,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Vinod Koul <vinod.koul@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] dma: add Qualcomm Technologies HIDMA channel driver
On Tuesday 03 November 2015 16:07:34 Sinan Kaya wrote:
> On 11/3/2015 5:43 AM, Arnd Bergmann wrote:
> > Ok, got it.
> >
> > Best add an explanation like the above in the interrupt handler,
> > to prevent this from accidentally getting 'cleaned up' to use
> > readl(), or copied into a driver that uses PCI ordering rules
> > where it is actually wrong.
> >
>
> I'm adding this disclaimer into the ISR routine.
>
> /*
> * Fine tuned for this HW...
> *
> * This ISR has been designed for this particular hardware. Relaxed read
> * and write accessors are used for performance reasons due to interrupt
> * delivery guarantees. Do not copy this code blindly and expect
> * that to work.
> */
>
>
Sounds good.
Arnd
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