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Message-ID: <alpine.DEB.2.11.1511041557050.4032@nanos>
Date:	Wed, 4 Nov 2015 15:57:41 +0100 (CET)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Luiz Capitulino <lcapitulino@...hat.com>
cc:	Fenghua Yu <fenghua.yu@...el.com>, H Peter Anvin <hpa@...or.com>,
	Ingo Molnar <mingo@...hat.com>,
	Peter Zijlstra <peterz@...radead.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	x86 <x86@...nel.org>,
	Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
	Marcelo Tosatti <mtosatti@...hat.com>, tj@...nel.org,
	riel@...hat.com
Subject: Re: [PATCH V15 00/11] x86: Intel Cache Allocation Technology
 Support

On Wed, 4 Nov 2015, Luiz Capitulino wrote:

> On Thu,  1 Oct 2015 23:09:34 -0700
> Fenghua Yu <fenghua.yu@...el.com> wrote:
> 
> > This series has some preparatory patches and Intel cache allocation
> > support.
> 
> Ping? What's the status of this series?

We still need to agree on the user space interface which is the
hardest part of it....

Thanks,

	tglx
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