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Message-Id: <1446689969-67703-1-git-send-email-davidcc@google.com> Date: Wed, 4 Nov 2015 18:19:28 -0800 From: David Carrillo-Cisneros <davidcc@...gle.com> To: Fenghua Yu <fenghua.yu@...el.com> Cc: Stephane Eranian <eranian@...gle.com>, Paul Turner <pjt@...gle.com>, linux-kernel@...r.kernel.org, David Carrillo-Cisneros <davidcc@...gle.com> Subject: [PATCH 1/2] x86/intel_rdt,intel_cqm: Remove build dependency of RDT code on CQM code. Minor code move to remove build dependency of RDT code on perf_event_intel_cqm.c . Signed-off-by: David Carrillo-Cisneros <davidcc@...gle.com> --- arch/x86/include/asm/pqr_common.h | 3 +++ arch/x86/kernel/cpu/Makefile | 6 +++++- arch/x86/kernel/cpu/perf_event_intel_cqm.c | 8 -------- arch/x86/kernel/cpu/pqr_common.c | 10 ++++++++++ 4 files changed, 18 insertions(+), 9 deletions(-) create mode 100644 arch/x86/kernel/cpu/pqr_common.c diff --git a/arch/x86/include/asm/pqr_common.h b/arch/x86/include/asm/pqr_common.h index 11e985c..228e943 100644 --- a/arch/x86/include/asm/pqr_common.h +++ b/arch/x86/include/asm/pqr_common.h @@ -1,6 +1,9 @@ #ifndef _X86_RDT_H_ #define _X86_RDT_H_ +#include <linux/types.h> +#include <asm/percpu.h> + #define MSR_IA32_PQR_ASSOC 0x0c8f /** diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile index b3292a4..5eb0f6e 100644 --- a/arch/x86/kernel/cpu/Makefile +++ b/arch/x86/kernel/cpu/Makefile @@ -39,7 +39,8 @@ obj-$(CONFIG_CPU_SUP_AMD) += perf_event_amd_iommu.o endif obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_p6.o perf_event_knc.o perf_event_p4.o obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_lbr.o perf_event_intel_ds.o perf_event_intel.o -obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_rapl.o perf_event_intel_cqm.o +obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_rapl.o +obj-$(CONFIG_CPU_SUP_INTEL) += pqr_common.o perf_event_intel_cqm.o obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_pt.o perf_event_intel_bts.o obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_cstate.o @@ -49,6 +50,9 @@ obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \ perf_event_intel_uncore_nhmex.o obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_msr.o obj-$(CONFIG_CPU_SUP_AMD) += perf_event_msr.o + +else +obj-$(CONFIG_INTEL_RDT) += pqr_common.o endif obj-$(CONFIG_INTEL_RDT) += intel_rdt.o diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c b/arch/x86/kernel/cpu/perf_event_intel_cqm.c index 04a696f..eee960d 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_cqm.c +++ b/arch/x86/kernel/cpu/perf_event_intel_cqm.c @@ -17,14 +17,6 @@ static u32 cqm_max_rmid = -1; static unsigned int cqm_l3_scale; /* supposedly cacheline size */ /* - * The cached intel_pqr_state is strictly per CPU and can never be - * updated from a remote CPU. Both functions which modify the state - * (intel_cqm_event_start and intel_cqm_event_stop) are called with - * interrupts disabled, which is sufficient for the protection. - */ -DEFINE_PER_CPU(struct intel_pqr_state, pqr_state); - -/* * Protects cache_cgroups and cqm_rmid_free_lru and cqm_rmid_limbo_lru. * Also protects event->hw.cqm_rmid * diff --git a/arch/x86/kernel/cpu/pqr_common.c b/arch/x86/kernel/cpu/pqr_common.c new file mode 100644 index 0000000..abcb432 --- /dev/null +++ b/arch/x86/kernel/cpu/pqr_common.c @@ -0,0 +1,10 @@ +#include <asm/pqr_common.h> + +/* + * The cached intel_pqr_state is strictly per CPU and can never be + * updated from a remote CPU. Both functions which modify the state + * (intel_cqm_event_start and intel_cqm_event_stop) are called with + * interrupts disabled, which is sufficient for the protection. + */ +DEFINE_PER_CPU(struct intel_pqr_state, pqr_state); + -- 2.6.0.rc2.230.g3dd15c0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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