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Message-ID: <CAPv3WKcOLsjGj1iyEiPdPkdkNS2O1-RytNMZUCgUCv9QUdY6FA@mail.gmail.com>
Date: Fri, 6 Nov 2015 20:37:38 +0100
From: Marcin Wojtas <mw@...ihalf.com>
To: Gregory CLEMENT <gregory.clement@...e-electrons.com>
Cc: "David S. Miller" <davem@...emloft.net>,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Jason Cooper <jason@...edaemon.net>,
Andrew Lunn <andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Lior Amsalem <alior@...vell.com>,
Nadav Haklai <nadavh@...vell.com>,
Simon Guinot <simon.guinot@...uanux.org>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Boris BREZILLON <boris.brezillon@...e-electrons.com>,
Russell King - ARM Linux <linux@....linux.org.uk>,
Willy Tarreau <w@....eu>
Subject: Re: [RFC PATCH 0/2] net: mvneta: Introduce RSS support
Hi Gregory,
> I also choose to associate all the TX queues on the same CPU that the
> one associated to the RX queue. It allows to contain all the
> interrupts on the same CPU. I think that an improvement on this side
> would be the support of the XPS.
>
Did you make some tries? E.g. after mapping certain txqs to CPU1, when
using them was mvneta_tx() executing only on this CPU? Or it rather
means that the irq will hit according to the mapping? As far as I know
the HW, the latter should be true, which would mean the real XPS with
this controller is impossible and the maximum we can control is the
irq.
I think it may be worth to unmask TX irqs on all cpus, so all percpu
napi's would be able to read tx_cause and process sent packets. I'm
looking forward to your opinion.
Best regards,
Marcin
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