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Message-ID: <5640EF2C.40907@cogentembedded.com>
Date:	Mon, 9 Nov 2015 22:08:28 +0300
From:	Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:	"Maciej W. Rozycki" <macro@...ux-mips.org>
Cc:	Ralf Baechle <ralf@...ux-mips.org>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
	linux-mips@...ux-mips.org, linux-ide@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] mips: sb1250_swarm_defconfig: disable IDE subsystem

On 11/09/2015 09:54 PM, Maciej W. Rozycki wrote:

>>>    I think I've been reasonably serious about my SWARM and despite issues
>>> elsewhere the onboard PATA interface is a part of the system I've never
>>> had any with.  Yes, it's limited to PIO 3, but it's not a big deal, that's
>>> still 11MB/s (and one of the 4 generic data movers present in the SoC
>>
>>     If you measure it with something like 'hdparm -t', the real speed figures
>> in the PIO modes would disappoint you. It's usually more like 3 MB/s even in
>> PIO4...

>   Well, various factors contribute to actual figures possible to achieve,
> the physical medium transfer speed being an important one.

    Yes, of course. Yet even with MWDMA2 (same wire speed as PIO4) hdparm 
shows about an order of magnitude higher speeds, IIRC. With the UltraDMA modes 
it becomes even higher...

> That 11MB/s
> throughput is the maximum you can ever get on the wire in PIO 3, assuming
> data is already available to transfer and IORDY is asserted right away
> every cycle.

    Yes, I figured.

[...]

>    Maciej

MBR, Sergei

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