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Message-ID: <20151109235728.GA7813@node.shutemov.name>
Date: Tue, 10 Nov 2015 01:57:28 +0200
From: "Kirill A. Shutemov" <kirill@...temov.name>
To: Toshi Kani <toshi.kani@....com>
Cc: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
hpa@...or.com, tglx@...utronix.de, mingo@...hat.com,
akpm@...ux-foundation.org, bp@...en8.de, linux-mm@...ck.org,
linux-kernel@...r.kernel.org, x86@...nel.org, jgross@...e.com,
konrad.wilk@...cle.com, elliott@....com, boris.ostrovsky@...cle.com
Subject: Re: [PATCH] x86/mm: fix regression with huge pages on PAE
On Mon, Nov 09, 2015 at 04:43:11PM -0700, Toshi Kani wrote:
> On Tue, 2015-11-10 at 01:18 +0200, Kirill A. Shutemov wrote:
> > Recent PAT patchset has caused issue on 32-bit PAE machines:
> :
> > The problem is in pmd_pfn_mask() and pmd_flags_mask(). These helpers use
> > PMD_PAGE_MASK to calculate resulting mask. PMD_PAGE_MASK is 'unsigned
> > long', not 'unsigned long long' as physaddr_t. As result upper bits of
> > resulting mask is truncated.
> >
> > The patch reworks code to use PMD_SHIFT as base of mask calculation
> > instead of PMD_PAGE_MASK.
> >
> > pud_pfn_mask() and pud_flags_mask() aren't problematic since we don't
> > have PUD page table level on 32-bit systems, but they reworked too to be
> > consistent with PMD counterpart.
> >
> > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
> > Reported-and-Tested-by: Boris Ostrovsky <boris.ostrovsky@...cle.com>
> > Fixes: f70abb0fc3da ("x86/asm: Fix pud/pmd interfaces to handle large PAT
> > bit")
> > Cc: Toshi Kani <toshi.kani@....com>
> > ---
> > arch/x86/include/asm/pgtable_types.h | 14 ++++----------
> > 1 file changed, 4 insertions(+), 10 deletions(-)
> >
> > diff --git a/arch/x86/include/asm/pgtable_types.h
> > b/arch/x86/include/asm/pgtable_types.h
> > index dd5b0aa9dd2f..c1e797266ce9 100644
> > --- a/arch/x86/include/asm/pgtable_types.h
> > +++ b/arch/x86/include/asm/pgtable_types.h
> > @@ -279,17 +279,14 @@ static inline pmdval_t native_pmd_val(pmd_t pmd)
> > static inline pudval_t pud_pfn_mask(pud_t pud)
> > {
> > if (native_pud_val(pud) & _PAGE_PSE)
> > - return PUD_PAGE_MASK & PHYSICAL_PAGE_MASK;
> > + return ~((1ULL << PUD_SHIFT) - 1) & PHYSICAL_PAGE_MASK;
>
> Thanks for the fix! Should we fix the PMD/PUD MASK/SIZE macros, so that we do
> not hit the same issue again when they are used?
I don't this so. PAGE_SIZE is not 'unsigned long long'. And all *PAGE_MASK
are usually applied to virtual addresses which are 'unsigned long'.
I think it's safer to leave them as they are.
>
> --- a/arch/x86/include/asm/page_types.h
> +++ b/arch/x86/include/asm/page_types.h
> @@ -17,10 +17,10 @@
> (ie, 32-bit PAE). */
> #define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
>
> -#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
> +#define PMD_PAGE_SIZE (_AC(1, ULL) << PMD_SHIFT)
> #define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
>
> -#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
> +#define PUD_PAGE_SIZE (_AC(1, ULL) << PUD_SHIFT)
> #define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
>
> Thanks,
> -Toshi
>
> --
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--
Kirill A. Shutemov
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