linux-kernel - Re: [RFC] perf x86 intel: Question about pebs_data

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Message-ID: <CABPqkBTx1D3U+eXTiK4BDGLHwd54cCMLxBGc6BzJD6MyreR5BA@mail.gmail.com>
Date:	Tue, 10 Nov 2015 14:41:09 -0800
From:	Stephane Eranian <eranian@...gle.com>
To:	Jiri Olsa <jolsa@...hat.com>
Cc:	Andi Kleen <andi@...stfloor.org>,
	lkml <linux-kernel@...r.kernel.org>,
	Ingo Molnar <mingo@...nel.org>,
	Paul Mackerras <paulus@...ba.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Don Zickus <dzickus@...hat.com>, Joe Mario <jmario@...hat.com>
Subject: Re: [RFC] perf x86 intel: Question about pebs_data_source data

On Mon, Nov 9, 2015 at 7:36 AM, Jiri Olsa <jolsa@...hat.com> wrote:
>
> hi,
> I was checking with SDM (September 2015) and I'd like if you
> guys could help me with understanding of following array elements
>
> I'm reffering to Table 18-19. Data Source Encoding for Load Latency Record
>
>  - element 5
>    SDM says:
>
>    05H L3 HIT. Local or Remote home requests that hit the L3 cache and was
>    serviced by another processor core with a cross core snoop where no modified
>    copies were found. (clean).
>
>    and we have L3 SNOOP MISS:
>      OP_LH | P(LVL, L3)  | P(SNOOP, MISS),   /* 0x05: L3 hit, snoop miss */
>
>    while the SDM indicates HIT
>
>  - element 6
>    SDM says:
>
>    L3 HIT. Local or Remote home requests that hit the L3 cache and was serviced
>    by another processor core with a cross core snoop where modified copies were
>    found. (HITM).
>
>    and we have L3 SNOOP HIT:
>      OP_LH | P(LVL, L3)  | P(SNOOP, HIT),    /* 0x06: L3 hit, snoop hit */
>
>    while the SDM indicates HITM
>
I seem to recall there was something incorrect in the SDM and that's
why I had it
this way. But it would be useful to double-check with Intel again. Andi?


> I'm probably misunderstanding SDM (wouldn't be the first time) what do I miss?
>
> thanks for comments,
> jirka
>
>
> ---
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> index 5db1c7755548..000ab82d09e7 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> @@ -57,8 +57,8 @@ static const u64 pebs_data_source[] = {
>         OP_LH | P(LVL, LFB) | P(SNOOP, NONE),   /* 0x02: LFB hit */
>         OP_LH | P(LVL, L2)  | P(SNOOP, NONE),   /* 0x03: L2 hit */
>         OP_LH | P(LVL, L3)  | P(SNOOP, NONE),   /* 0x04: L3 hit */
> -       OP_LH | P(LVL, L3)  | P(SNOOP, MISS),   /* 0x05: L3 hit, snoop miss */
> -       OP_LH | P(LVL, L3)  | P(SNOOP, HIT),    /* 0x06: L3 hit, snoop hit */
> +       OP_LH | P(LVL, L3)  | P(SNOOP, HIT),    /* 0x05: L3 hit, snoop hit */
> +       OP_LH | P(LVL, L3)  | P(SNOOP, HITM),   /* 0x06: L3 hit, snoop hitm */
>         OP_LH | P(LVL, L3)  | P(SNOOP, HITM),   /* 0x07: L3 hit, snoop hitm */
>         OP_LH | P(LVL, REM_CCE1) | P(SNOOP, HIT),  /* 0x08: L3 miss snoop hit */
>         OP_LH | P(LVL, REM_CCE1) | P(SNOOP, HITM), /* 0x09: L3 miss snoop hitm*/
--
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