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Date:	Wed, 11 Nov 2015 09:44:35 +0300
From:	Pavel Fedin <p.fedin@...sung.com>
To:	'Rob Herring' <robh+dt@...nel.org>
Cc:	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
	'Pawel Moll' <pawel.moll@....com>,
	'Mark Rutland' <mark.rutland@....com>,
	'Ian Campbell' <ijc+devicetree@...lion.org.uk>,
	'Kumar Gala' <galak@...eaurora.org>,
	'Kukjin Kim' <kgene@...nel.org>,
	'Krzysztof Kozlowski' <k.kozlowski@...sung.com>
Subject: RE: [PATCH v7 1/4] Documentation: dt-bindings: Describe SROMc
 configuration

 Hello!

> > +- samsung,srom-timing : array of 6 integers, specifying bank timings in the
> > +                        following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
> > +                        Each value is specified in cycles and has the following
> > +                        meaning and valid range:
> > +                        Tacp : Page mode access cycle at Page mode (0 - 15)
> > +                        Tcah : Address holding time after CSn (0 - 15)
> > +                        Tcoh : Chip selection hold on OEn (0 - 15)
> > +                        Tacc : Access cycle (0 - 31, the actual time is N + 1)
> > +                        Tcos : Chip selection set-up before OEn (0 - 15)
> > +                        Tacs : Address set-up before CSn (0 - 15)
> 
> This is not easily extended. Perhaps a property per value instead.

 We had a discussion with Krzysztof about it, he agreed with this form of the property.
My concern was that it's just too much typing, and makes little sense because these
settings always go together. If register layout changes, or parameter set changes in
incompatible way, then it's another device, not exynos-srom anymore.
 So would you agree with that, or is your position strong?

> >                 compatible = "samsung,exynos-srom";
> > -               reg = <0x12570000 0x10>;
> > +               reg = <0x12570000 0x14>;
> > +
> > +               ethernet@3 {
> > +                       compatible = "smsc,lan9115";
> > +                       reg = <3 0 0x10000>;       // Bank 3, offset = 0
> > +                       phy-mode = "mii";
> > +                       interrupt-parent = <&gpx0>;
> > +                       interrupts = <5 8>;
> > +                       reg-io-width = <2>;
> > +                       smsc,irq-push-pull;
> > +                       smsc,force-internal-phy;
> > +
> > +                       samsung,srom-config = <1 9 12 1 9 1 1>;
> 
> This doesn't match the doc.

 Damn, overlooked. :(

Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia

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