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Date:	Wed, 11 Nov 2015 16:15:38 +0100
From:	Paolo Bonzini <pbonzini@...hat.com>
To:	Jian Zhou <jianjay.zhou@...wei.com>, kvm@...r.kernel.org,
	gleb@...nel.org, tglx@...utronix.de, mingo@...hat.com,
	hpa@...or.com, x86@...nel.org, linux-kernel@...r.kernel.org
Cc:	herongguang.he@...wei.com, zhang.zhanghailiang@...wei.com,
	weidong.huang@...wei.com, peter.huangpeng@...wei.com
Subject: Re: [PATCH v2 3/4] KVM: X86: Migration is supported



On 23/10/2015 11:15, Jian Zhou wrote:
> data *msr_info)
>  		}
>  		break;
>  	case MSR_IA32_DEBUGCTLMSR:
> -		if (!data) {
> -			/* We support the non-activated case already */
> -			break;
> -		} else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
> -			/* Values other than LBR and BTF are vendor-specific,
> -			   thus reserved and should throw a #GP */
> +		supported = DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF |
> +				DEBUGCTLMSR_FREEZE_LBRS_ON_PMI;
> +
> +		if (data & ~supported) {
> +			/*
> +			 * Values other than LBR/BTF/FREEZE_LBRS_ON_PMI
> +			 * are not supported, thus reserved and should throw a #GP
> +			 */
> +			vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
> +					__func__, data);
>  			return 1;
>  		}
> -		vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
> -			    __func__, data);
> +		if (kvm_x86_ops->set_debugctlmsr) {
> +			if (kvm_x86_ops->set_debugctlmsr(vcpu, data))
> +				return 1;
> +		}
> +		else
> +			return 1;
> +
>  		break;
>  	case 0x200 ... 0x2ff:
>  		return kvm_mtrr_set_msr(vcpu, msr, data);
> @@ -2078,6 +2090,33 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  			vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
>  				    "0x%x data 0x%llx\n", msr, data);
>  		break;
> +	case MSR_LBR_STATUS:
> +		if (kvm_x86_ops->set_debugctlmsr) {
> +			vcpu->arch.lbr_status = (data == 0) ? 0 : 1;
> +			if (data)
> +				kvm_x86_ops->set_debugctlmsr(vcpu,
> +						DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);
> +		} else
> +			vcpu_unimpl(vcpu, "lbr is disabled, ignored wrmsr: "
> +					"0x%x data 0x%llx\n", msr, data);
> +		break;
> +	case MSR_LBR_SELECT:
> +	case MSR_LBR_TOS:
> +	case MSR_PENTIUM4_LER_FROM_LIP:
> +	case MSR_PENTIUM4_LER_TO_LIP:
> +	case MSR_PENTIUM4_LBR_TOS:
> +	case MSR_IA32_LASTINTFROMIP:
> +	case MSR_IA32_LASTINTTOIP:
> +	case MSR_LBR_CORE2_FROM ... MSR_LBR_CORE2_FROM + 0x7:
> +	case MSR_LBR_CORE2_TO ... MSR_LBR_CORE2_TO + 0x7:
> +	case MSR_LBR_NHM_FROM ... MSR_LBR_NHM_FROM + 0x1f:
> +	case MSR_LBR_NHM_TO ... MSR_LBR_NHM_TO + 0x1f:
> +		if (kvm_x86_ops->set_lbr_msr)
> +			kvm_x86_ops->set_lbr_msr(vcpu, msr, data);
> +		else
> +			vcpu_unimpl(vcpu, "lbr is disabled, ignored wrmsr: "
> +					"0x%x data 0x%llx\n", msr, data);

I think you can just do this in kvm_x86_ops->set_msr.  The old
implementation for DEBUGCTL MSR can be moved to svm.c.

Paolo
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