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Message-ID: <1447325545.2825.9.camel@linaro.org>
Date: Thu, 12 Nov 2015 10:52:25 +0000
From: "Jon Medhurst (Tixy)" <tixy@...aro.org>
To: Liviu Dudau <Liviu.Dudau@....com>
Cc: Rob Herring <robh@...nel.org>, David Airlie <airlied@...ux.ie>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Sudeep Holla <sudeep.holla@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Pawel Moll <pawel.moll@....com>, Arnd Bergmann <arnd@...db.de>,
Olof Johansson <olof@...om.net>,
Punit Agrawal <punit.agrawal@....com>,
DRI devel <dri-devel@...ts.freedesktop.org>,
devicetree <devicetree@...r.kernel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Andrew Morton <akpm@...ux-foundation.org>,
LAKML <linux-arm-kernel@...ts.infradead.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/4] drm: arm: Add DT bindings documentation for
HDLCD driver.
On Thu, 2015-11-12 at 10:42 +0000, Liviu Dudau wrote:
> > This is on-chip RAM or nornal system RAM? We already have bindings
> for
> > both.
>
> Juno has a set of TLX (ThinLinks) connectors on the board where an
> FPGA can be attached. On r1
> the code running on FPGA can even participate as an AXI master with
> full coherency. The FPGA
> has local memory that we want to share with the HDLCD to be used as a
> framebuffer.
The HDLCD on the Juno chip or one implemented in the FPGA? I assume you
mean the latter but just wanted to check.
--
Tixy
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