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Message-ID: <8520D5D51A55D047800579B0941471982585C806@XAP-PVEXMBX01.xlnx.xilinx.com>
Date: Mon, 16 Nov 2015 10:27:27 +0000
From: Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
To: Rob Herring <robh@...nel.org>
CC: "pawel.moll@....com" <pawel.moll@....com>,
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Ravikiran Gummaluri <rgummal@...inx.com>
Subject: RE: [PATCH v8] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL
PCIe Host Controller
> On Wed, Nov 11, 2015 at 12:03:39PM +0530, Bharat Kumar Gogada wrote:
> > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
> >
> > Signed-off-by: Bharat Kumar Gogada <bharatku@...inx.com>
> > Signed-off-by: Ravi Kiran Gummaluri <rgummal@...inx.com>
>
> I acked v7. Please add acks when sending a new version.
Hi Rob,
I'm sorry for not adding I forgot to do so, I will definitely add this in next patch.
Regards,
Bharat Kumar Gogada
>
> Acked-by: Rob Herring <robh@...nel.org>
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