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Message-Id: <1447788896-15553-2-git-send-email-albeu@free.fr>
Date:	Tue, 17 Nov 2015 20:34:51 +0100
From:	Alban Bedel <albeu@...e.fr>
To:	linux-mips@...ux-mips.org
Cc:	Ralf Baechle <ralf@...ux-mips.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Marc Zyngier <marc.zyngier@....com>,
	Alexander Couzens <lynxis@...0.eu>,
	Joel Porquet <joel@...quet.org>,
	Andrew Bresticker <abrestic@...omium.org>,
	linux-kernel@...r.kernel.org, Alban Bedel <albeu@...e.fr>
Subject: [PATCH 1/6] MIPS: ath79: Fix the size of the MISC INTC registers in ar9132.dtsi

There is 2 registers that is 8 bytes long, not 4.

Signed-off-by: Alban Bedel <albeu@...e.fr>
---
 arch/mips/boot/dts/qca/ar9132.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/boot/dts/qca/ar9132.dtsi b/arch/mips/boot/dts/qca/ar9132.dtsi
index 857ca48..3ad4ba9 100644
--- a/arch/mips/boot/dts/qca/ar9132.dtsi
+++ b/arch/mips/boot/dts/qca/ar9132.dtsi
@@ -107,7 +107,7 @@
 			miscintc: interrupt-controller@...60010 {
 				compatible = "qca,ar9132-misc-intc",
 					   "qca,ar7100-misc-intc";
-				reg = <0x18060010 0x4>;
+				reg = <0x18060010 0x8>;
 
 				interrupt-parent = <&cpuintc>;
 				interrupts = <6>;
-- 
2.0.0

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