linux-kernel - Re: [RFC PATCH 3/3] x86/cpu/amd, kvm: Satisfy guest kernel reads of IC

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Date:	Wed, 18 Nov 2015 12:11:18 +0100
From:	Paolo Bonzini <pbonzini@...hat.com>
To:	Borislav Petkov <bp@...en8.de>, LKML <linux-kernel@...r.kernel.org>
Cc:	X86 ML <x86@...nel.org>, KVM <kvm@...r.kernel.org>
Subject: Re: [RFC PATCH 3/3] x86/cpu/amd, kvm: Satisfy guest kernel reads of
 IC_CFG MSR



On 14/11/2015 11:37, Borislav Petkov wrote:
> From: Borislav Petkov <bp@...e.de>
> 
> The kernel accesses IC_CFG MSR (0xc0011021) on AMD because it checks
> whether the way access filter is enabled on some F15h models, and, if
> so, disables it.
> 
> kvm doesn't handle that MSR access and complains about it, which can
> get really noisy in dmesg when one starts kvm guests all the time for
> testing. And it is useless anyway - guest kernel shouldn't be doing such
> changes anyway so tell it that that filter is disabled.
> 
> Signed-off-by: Borislav Petkov <bp@...e.de>
> Cc: Paolo Bonzini <pbonzini@...hat.com>
> ---
>  arch/x86/include/asm/msr-index.h |  1 +
>  arch/x86/kernel/cpu/amd.c        |  4 ++--
>  arch/x86/kvm/svm.c               | 17 +++++++++++++++++
>  3 files changed, 20 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index 9f3905697f12..5384485f8569 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -322,6 +322,7 @@
>  #define MSR_F15H_PERF_CTR		0xc0010201
>  #define MSR_F15H_NB_PERF_CTL		0xc0010240
>  #define MSR_F15H_NB_PERF_CTR		0xc0010241
> +#define MSR_F15H_IC_CFG			0xc0011021
>  
>  /* Fam 10h MSRs */
>  #define MSR_FAM10H_MMIO_CONF_BASE	0xc0010058
> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> index 4a70fc6d400a..1d76dcdf7e55 100644
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -665,9 +665,9 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
>  	 * Disable it on the affected CPUs.
>  	 */
>  	if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
> -		if (!rdmsrl_safe(0xc0011021, &value) && !(value & 0x1E)) {
> +		if (!rdmsrl_safe(MSR_F15H_IC_CFG, &value) && !(value & 0x1E)) {
>  			value |= 0x1E;
> -			wrmsrl_safe(0xc0011021, value);
> +			wrmsrl_safe(MSR_F15H_IC_CFG, value);
>  		}
>  	}
>  }
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 83a1c643f9a5..58b64c17c4a8 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -3053,6 +3053,23 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  	case MSR_IA32_UCODE_REV:
>  		msr_info->data = 0x01000065;
>  		break;
> +	case MSR_F15H_IC_CFG: {
> +
> +		int family, model;
> +
> +		family = guest_cpuid_family(vcpu);
> +		model  = guest_cpuid_model(vcpu);
> +
> +		if (family < 0 || model < 0)
> +			return kvm_get_msr_common(vcpu, msr_info);
> +
> +		msr_info->data = 0;
> +
> +		if (family == 0x15 &&
> +		    (model >= 0x2 && model < 0x20))
> +			msr_info->data = 0x1E;
> +		}
> +		break;
>  	default:
>  		return kvm_get_msr_common(vcpu, msr_info);
>  	}
> 

Reviewed-by: Paolo Bonzini <pbonzini@...hat.com>
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