linux-kernel - Re: [RESEND RFC/PATCH 1/8] dt-bindings: Add a binding for Mediatek Video Processor Unit

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Message-ID: <1447901230.6731.3.camel@mtksdaap41>
Date:	Thu, 19 Nov 2015 10:47:10 +0800
From:	andrew-ct chen <andrew-ct.chen@...iatek.com>
To:	Mark Rutland <mark.rutland@....com>
CC:	Tiffany Lin <tiffany.lin@...iatek.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	"Catalin Marinas" <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	"Mauro Carvalho Chehab" <mchehab@....samsung.com>,
	Matthias Brugger <matthias.bgg@...il.com>,
	Daniel Kurtz <djkurtz@...omium.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Hongzhou Yang <hongzhou.yang@...iatek.com>,
	"Hans Verkuil" <hans.verkuil@...co.com>,
	Laurent Pinchart <laurent.pinchart@...asonboard.com>,
	Sakari Ailus <sakari.ailus@....fi>,
	Geert Uytterhoeven <geert@...ux-m68k.org>,
	Mikhail Ulyanov <mikhail.ulyanov@...entembedded.com>,
	Fabien Dessenne <fabien.dessenne@...com>,
	Arnd Bergmann <arnd@...db.de>,
	Darren Etheridge <detheridge@...com>,
	Peter Griffin <peter.griffin@...aro.org>,
	"Benoit Parrot" <bparrot@...com>,
	Eddie Huang <eddie.huang@...iatek.com>,
	"Yingjoe Chen" <yingjoe.chen@...iatek.com>,
	James Liao <jamesjj.liao@...iatek.com>,
	Daniel Hsiao <daniel.hsiao@...iatek.com>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-media@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>
Subject: Re: [RESEND RFC/PATCH 1/8] dt-bindings: Add a binding for Mediatek
 Video Processor Unit

On Tue, 2015-11-17 at 14:13 +0000, Mark Rutland wrote:
> On Tue, Nov 17, 2015 at 08:54:38PM +0800, Tiffany Lin wrote:
> > From: Andrew-CT Chen <andrew-ct.chen@...iatek.com>
> > 
> > Add a DT binding documentation of Video Processor Unit for the
> > MT8173 SoC from Mediatek.
> > 
> > Signed-off-by: Andrew-CT Chen <andrew-ct.chen@...iatek.com>
> > ---
> >  .../devicetree/bindings/media/mediatek-vpu.txt     |   27 ++++++++++++++++++++
> >  1 file changed, 27 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/media/mediatek-vpu.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/media/mediatek-vpu.txt b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
> > new file mode 100644
> > index 0000000..99a4e5e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
> > @@ -0,0 +1,27 @@
> > +* Mediatek Video Processor Unit
> > +
> > +Video Processor Unit is a HW video controller. It controls HW Codec including
> > +H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
> > +
> > +Required properties:
> > +  - compatible: "mediatek,mt8173-vpu"
> > +  - reg: Must contain an entry for each entry in reg-names.
> > +  - reg-names: Must include the following entries:
> > +    "sram": SRAM base
> > +    "cfg_reg": Main configuration registers base
> > +  - interrupts: interrupt number to the cpu.
> > +  - clocks : clock name from clock manager
> > +  - clock-names: the clocks of the VPU H/W
> 
> You need to explicitly define the set of clock-names you expect here.
> 
> Mark.

Sorry, only one clock to enable VPU hardware.
We will modify to
- clocks : must contain one entry for each clock-names.
- clock-names : must be "main", It is the main clock of VPU.

Thanks..

> 
> > +  - iommus : phandle and IOMMU spcifier for the IOMMU that serves the VPU.
> > +
> > +Example:
> > +	vpu: vpu@...20000 {
> > +		compatible = "mediatek,mt8173-vpu";
> > +		reg = <0 0x10020000 0 0x30000>,
> > +		      <0 0x10050000 0 0x100>;
> > +		reg-names = "sram", "cfg_reg";
> > +		interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> > +		clocks = <&topckgen TOP_SCP_SEL>;
> > +		clock-names = "main";
> > +		iommus = <&iommu M4U_PORT_VENC_RCPU>;
> > +	};
> > -- 
> > 1.7.9.5
> > 


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