linux-kernel - [PATCH v2 6/6] arm64: dts: berlin4ct: add pll and clock nodes

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Message-ID: <1448008952-1787-7-git-send-email-jszhang@marvell.com>
Date:	Fri, 20 Nov 2015 16:42:32 +0800
From:	Jisheng Zhang <jszhang@...vell.com>
To:	<robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<catalin.marinas@....com>, <will.deacon@....com>,
	<mturquette@...libre.com>, <sboyd@...eaurora.org>,
	<sebastian.hesselbarth@...il.com>,
	<antoine.tenart@...e-electrons.com>
CC:	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-clk@...r.kernel.org>, Jisheng Zhang <jszhang@...vell.com>
Subject: [PATCH v2 6/6] arm64: dts: berlin4ct: add pll and clock nodes

Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.

Signed-off-by: Jisheng Zhang <jszhang@...vell.com>
---
 arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 38 ++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
index a4a1876..808a997 100644
--- a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
+++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
@@ -42,6 +42,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include <dt-bindings/clock/berlin4ct.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
@@ -135,6 +136,22 @@
 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
+		cpupll: cpupll {
+			compatible = "marvell,berlin-pll";
+			reg = <0x922000 0x14>, <0xea0710 4>;
+			#clock-cells = <0>;
+			clocks = <&osc>, <&clk CLK_CPUFASTREF>;
+			bypass-shift = /bits/ 8 <2>;
+		};
+
+		mempll: mempll {
+			compatible = "marvell,berlin-pll";
+			reg = <0x940034 0x14>, <0xea0710 4>;
+			#clock-cells = <0>;
+			clocks = <&osc>, <&clk CLK_MEMFASTREF>;
+			bypass-shift = /bits/ 8 <1>;
+		};
+
 		apb@...000 {
 			compatible = "simple-bus";
 			#address-cells = <1>;
@@ -225,6 +242,27 @@
 			};
 		};
 
+		syspll: syspll {
+			compatible = "marvell,berlin-pll";
+			reg = <0xea0200 0x14>, <0xea0710 4>;
+			#clock-cells = <0>;
+			clocks = <&osc>;
+			bypass-shift = /bits/ 8 <0>;
+		};
+
+		gateclk: gateclk {
+			compatible = "marvell,berlin4ct-gateclk";
+			reg = <0xea0700 4>;
+			#clock-cells = <1>;
+		};
+
+		clk: clk {
+			compatible = "marvell,berlin4ct-clk";
+			reg = <0xea0720 0x144>;
+			#clock-cells = <1>;
+			clocks = <&syspll>;
+		};
+
 		soc_pinctrl: pin-controller@...000 {
 			compatible = "marvell,berlin4ct-soc-pinctrl";
 			reg = <0xea8000 0x14>;
-- 
2.6.2

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