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Message-ID: <20151120171527.GL32672@codeaurora.org>
Date:	Fri, 20 Nov 2015 09:15:27 -0800
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Jon Hunter <jonathanh@...dia.com>
Cc:	Peter De Schrijver <pdeschrijver@...dia.com>,
	Prashant Gaikwad <pgaikwad@...dia.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Warren <swarren@...dotorg.org>,
	Thierry Reding <thierry.reding@...il.com>,
	Alexandre Courbot <gnurou@...il.com>,
	linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
	linux-kernel@...r.kernel.org, Rhyland Klein <rklein@...dia.com>
Subject: Re: [PATCH] clk: tegra: Fix bypassing of PLLs

On 11/20, Jon Hunter wrote:
> The _clk_disable_pll() function will attempt to place a PLL into bypass
> if the TEGRA_PLL_BYPASS is specified for the PLL and then disable the PLL
> by clearing the enable bit. To place the PLL into bypass, the bypass bit
> needs to be set and not cleared. Fix this by setting the bypass bit and
> not clearing it.
> 
> Signed-off-by: Jon Hunter <jonathanh@...dia.com>
> ---

Fixes tag? It looks like this has been wrong from the beginning
of time.

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