lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Mon, 23 Nov 2015 11:15:13 +0800 From: MaJun <majun258@...wei.com> To: <Catalin.Marinas@....com>, <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, <Will.Deacon@....com>, <mark.rutland@....com>, <marc.zyngier@....com>, <jason@...edaemon.net>, <tglx@...utronix.de>, <lizefan@...wei.com>, <huxinwei@...wei.com>, <dingtianhong@...wei.com>, <zhaojunhua@...ilicon.com>, <liguozhu@...ilicon.com>, <xuwei5@...ilicon.com>, <wei.chenwei@...ilicon.com>, <guohanjun@...wei.com>, <wuyun.wu@...wei.com>, <guodong.xu@...aro.org>, <haojian.zhuang@...aro.org>, <zhangfei.gao@...aro.org>, <usman.ahmad@...aro.org>, <klimov.linux@...il.com>, <gabriele.paoloni@...wei.com>, <majun258@...wei.com> Subject: [PATCH v9 4/4] irqchip:implement the mbigen irq chip operation functions From: Ma Jun <majun258@...wei.com> Add the interrupt controller chip operation functions of mbigen chip. Signed-off-by: Ma Jun <majun258@...wei.com> --- drivers/irqchip/irq-mbigen.c | 84 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 84 insertions(+), 0 deletions(-) diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c index 81ae61f..540ad05 100644 --- a/drivers/irqchip/irq-mbigen.c +++ b/drivers/irqchip/irq-mbigen.c @@ -47,6 +47,20 @@ #define REG_MBIGEN_VEC_OFFSET 0x200 /** + * offset of clear register in mbigen node + * This register is used to clear the status + * of interrupt + */ +#define REG_MBIGEN_CLEAR_OFFSET 0xa000 + +/** + * offset of interrupt type register + * This register is used to configure interrupt + * trigger type + */ +#define REG_MBIGEN_TYPE_OFFSET 0x0 + +/** * struct mbigen_device - holds the information of mbigen device. * * @pdev: pointer to the platform device structure of mbigen chip. @@ -69,8 +83,78 @@ static inline unsigned int get_mbigen_vec_reg(irq_hw_number_t hwirq) + REG_MBIGEN_VEC_OFFSET; } +static inline void get_mbigen_type_reg(irq_hw_number_t hwirq, + unsigned int *mask, + unsigned int *addr) +{ + unsigned int nid, pin, ofst; + + hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; + nid = hwirq / IRQS_PER_MBIGEN_NODE + 1; + pin = hwirq % IRQS_PER_MBIGEN_NODE; + + *mask = 1 << (pin % 32); + + ofst = pin / 32 * 4; + *addr = ofst + nid * MBIGEN_NODE_OFFSET + + REG_MBIGEN_TYPE_OFFSET; +} + +static inline void get_mbigen_clear_reg(irq_hw_number_t hwirq, + unsigned int *mask, + unsigned int *addr) +{ + unsigned int ofst; + + hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; + ofst = hwirq / 32 * 4; + + *mask = 1 << (hwirq % 32); + *addr = ofst + REG_MBIGEN_CLEAR_OFFSET; +} + +static void mbigen_eoi_irq(struct irq_data *data) +{ + void __iomem *base = data->chip_data; + unsigned int mask, addr; + + get_mbigen_clear_reg(data->hwirq, &mask, &addr); + + writel_relaxed(mask, base + addr); + + irq_chip_eoi_parent(data); +} + +static int mbigen_set_type(struct irq_data *data, unsigned int type) +{ + void __iomem *base = data->chip_data; + unsigned int mask, addr; + u32 val; + + if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING) + return -EINVAL; + + get_mbigen_type_reg(data->hwirq, &mask, &addr); + + val = readl_relaxed(base + addr); + + if (type == IRQ_TYPE_LEVEL_HIGH) + val |= mask; + else + val &= ~mask; + + writel_relaxed(val, base + addr); + + return 0; +} + static struct irq_chip mbigen_irq_chip = { .name = "mbigen-v2", + .irq_mask = irq_chip_mask_parent, + .irq_unmask = irq_chip_unmask_parent, + .irq_eoi = mbigen_eoi_irq, + .irq_set_type = mbigen_set_type, + .irq_set_affinity = irq_chip_set_affinity_parent, }; static void mbigen_write_msg(struct msi_desc *desc, struct msi_msg *msg) -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists