linux-kernel - Re: [PATCH v9] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

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Date:	Wed, 25 Nov 2015 14:23:29 +0530
From:	Amit Tomer <amittomer25@...il.com>
To:	Marc Zyngier <marc.zyngier@....com>
Cc:	Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>,
	"mark.rutland@....com" <mark.rutland@....com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"tinamdar@....com" <tinamdar@....com>,
	"pawel.moll@....com" <pawel.moll@....com>,
	"m-karicheri2@...com" <m-karicheri2@...com>,
	Michal Simek <michals@...inx.com>,
	"rjui@...adcom.com" <rjui@...adcom.com>,
	"treding@...dia.com" <treding@...dia.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"arnd@...db.de" <arnd@...db.de>,
	"ijc+devicetree@...lion.org.uk" <ijc+devicetree@...lion.org.uk>,
	"hauke@...ke-m.de" <hauke@...ke-m.de>,
	"robh+dt@...nel.org" <robh+dt@...nel.org>,
	Ravikiran Gummaluri <rgummal@...inx.com>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"sbranden@...adcom.com" <sbranden@...adcom.com>,
	"dhdang@....com" <dhdang@....com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"Minghuan.Lian@...escale.com" <Minghuan.Lian@...escale.com>,
	Soren Brinkmann <sorenb@...inx.com>,
	"galak@...eaurora.org" <galak@...eaurora.org>
Subject: Re: [PATCH v9] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL
 PCIe Host Controller

Sorry to intervene but just trying to learn from your comments.

 > You have plenty, and that's the whole of your device space. *All of it*. So
>   just take the base address of your PCIe controller, and be done with
>   it.

but isn't few of PCIe controller's registers itself are mapped
here(base address). So, how can we use this address for MSI?

Or you said from base address of PCIe controller, find an offset that
can be used as MSI address?

Thanks
Amit.
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