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Message-ID: <1448466514-5298-1-git-send-email-jszhang@marvell.com>
Date: Wed, 25 Nov 2015 23:48:32 +0800
From: Jisheng Zhang <jszhang@...vell.com>
To: <daniel.lezcano@...aro.org>, <tglx@...utronix.de>, <arnd@...db.de>
CC: <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Jisheng Zhang <jszhang@...vell.com>
Subject: [PATCH v3 0/2] clocksource/drivers/dw_apb_timer: improve performance a bit
These two patches try to improve the dw_apb_timer clocksource/clockevent
performance.
since v2:
- only use relaxed version in critical path
- inline apbt_readl/apbt_writel
- add some performance numbers
since v1:
- correct the wrong sentence in commit msg about writel performance on
CA9 with outer L2 cache. Thank Arnd for pointing out this in another
thread.
Jisheng Zhang (2):
clocksource/drivers/dw_apb_timer: Inline apbt_readl and apbt_writel
clocksource/drivers/dw_apb_timer: Use {readl|writel}_relaxed in
critical path
drivers/clocksource/dw_apb_timer.c | 30 +++++++++++++++++++++---------
1 file changed, 21 insertions(+), 9 deletions(-)
--
2.6.2
--
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