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Message-ID: <CALCETrX4+71vnqMz1Z2Ojqb93mPUStXjXNoBmCN0P5OWBTFzBQ@mail.gmail.com>
Date: Wed, 2 Dec 2015 12:06:55 -0800
From: Andy Lutomirski <luto@...nel.org>
To: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Len Brown <len.brown@...el.com>, X86 ML <x86@...nel.org>
Subject: Skylake (XPS 13 9350) TSC is way off
[ 0.000000] tsc: PIT calibration matches HPET. 2 loops
[ 0.000000] tsc: Detected 2399.975 MHz processor
[ 0.090897] TSC deadline timer enabled
[ 1.960034] tsc: Refined TSC clocksource calibration: 2400.007 MHz
[ 1.960039] clocksource: tsc: mask: 0xffffffffffffffff max_cycles:
0x22983e30402, max_idle_ns: 440795260848 ns
[ 2.959936] clocksource: Switched to clocksource tsc
[ 87.168211] Adjusting tsc more than 11% (5941981 vs 7759439)
This is more or less Linus' latest tree (v4.4-rc3 plus some unrelated
platform driver patches).
--Andy
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