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Message-Id: <1449124437-18479-2-git-send-email-yamada.masahiro@socionext.com>
Date:	Thu,  3 Dec 2015 15:33:56 +0900
From:	Masahiro Yamada <yamada.masahiro@...ionext.com>
To:	arm@...nel.org
Cc:	Masahiro Yamada <yamada.masahiro@...ionext.com>,
	Russell King <linux@....linux.org.uk>,
	devicetree@...r.kernel.org, Kumar Gala <galak@...eaurora.org>,
	linux-kernel@...r.kernel.org,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	linux-arm-kernel@...ts.infradead.org
Subject: [PATCH 1/2] ARM: dts: uniphier: change IRQ number of UART3 of PH1-Pro4 SoC

The UART3 is assigned with IRQ 29 for old SoCs, IRQ 177 for new ones,
and PH1-Pro4 is on the boundary.

  PH1-sLD3: UART3 is unavailable
  PH1-LD4, PH1-sLD8: only IRQ 29 is supported
  PH1-Pro4: both IRQ 29 and 177 are supported
  PH1-Pro5, ProXstream2, PH1-LD6b: only IRQ 177 is supported

This SoC can choose either IRQ 29 or IRQ 177, but the former is shared
with another hardware (low speed serial0).  The latter is dedicated
for this hardware and more recommended.

Signed-off-by: Masahiro Yamada <yamada.masahiro@...ionext.com>
---

 arch/arm/boot/dts/uniphier-ph1-pro4.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index 254642f..bbf3727 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -151,7 +151,7 @@
 			reg = <0x54006b00 0x40>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
-			interrupts = <0 29 4>;
+			interrupts = <0 177 4>;
 			clocks = <&uart_clk>;
 			fifo-size = <64>;
 		};
-- 
1.9.1

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