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Message-ID: <20151203212944.GB17308@twins.programming.kicks-ass.net>
Date: Thu, 3 Dec 2015 22:29:44 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Andi Kleen <andi@...stfloor.org>
Cc: linux-kernel@...r.kernel.org, mingo@...nel.org,
Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 2/2] x86, perf: Allow zero PEBS status with only single
active event
On Thu, Dec 03, 2015 at 01:22:20PM -0800, Andi Kleen wrote:
> + /*
> + * On some CPUs the PEBS status can be zero when PEBS is
> + * racing with clearing of GLOBAL_STATUS.
> + *
> + * Normally we would drop that record, but in the
> + * case when there is only a single active PEBS event
> + * we can assume it's for that event.
> + */
> + if (!pebs_status && cpuc->pebs_enabled &&
> + !(cpuc->pebs_enabled & (cpuc->pebs_enabled-1)))
> + pebs_status = cpuc->pebs_enabled;
> +
> bit = find_first_bit((unsigned long *)&pebs_status,
> x86_pmu.max_pebs_events);
> if (bit >= x86_pmu.max_pebs_events)
Ah! I think this is the comment I just asked for.
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