linux-kernel - [PATCH v5 0/4] ARM: sunxi: Allwinner H3 support

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Message-Id: <1449264283-25360-1-git-send-email-jenskuske@gmail.com>
Date:	Fri,  4 Dec 2015 22:24:39 +0100
From:	Jens Kuske <jenskuske@...il.com>
To:	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Linus Walleij <linus.walleij@...aro.org>
Cc:	Hans de Goede <hdegoede@...hat.com>,
	Reinder de Haan <patchesrdh@...as.com>,
	Vishnu Patekar <vishnupatekar0510@...il.com>,
	Emilio López <emilio@...pez.com.ar>,
	Jens Kuske <jenskuske@...il.com>, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	linux-sunxi@...glegroups.com
Subject: [PATCH v5 0/4] ARM: sunxi: Allwinner H3 support

Hi everyone,

This is v5 of my patch series introducing basic kernel support for Allwinner's
H3 SoC. It mainly adds basic clocks, resets and pinctrl. It also adds
interrupts, timers, watchdog, RTC, dmaengine, MMC and UARTs, which are mostly
compatible to those in earlier SoCs like A23 and A31, and can simply be reused.

These patches are based on the sunxi-next branch from
git://github.com/linux-sunxi/linux-sunxi.git


Patch 1 adds basic H3 clocks.

Patch 2 adds pin sets for the H3 main PIO.

Patch 3 adds the DTSI for the H3.

Patch 4 adds a DTS for the Orange Pi Plus SBC, which these patches
were developed and tested with.

Changes since v4:
- drop the pll clock cleanup and use dummy clocks instead for now, Maxime
  wants to take care of cleaning up the plls
- split the resets again (as in v1), drop the of_xlate
- fix all reported pinctrl mistakes
- remove memory node and timer frequency from dtsi
- rename the bus gates to bus_*
- clean up the bus gates driver

Changes since v3:
- add a clock driver specific to the bus gates instead of listing parents in
  the DTSI
- skip the holes in the reset controller with of_xlate()

Changes since v2:
- add mbus clock
- add Maxime's suggestion to take the substring up to the first "_" as name
  for the divs base clock
- use A31 pll6 for H3 pll6
- use a clock similar to the new simple gates for H3 bus gates
- drop the pinctrl-as-module patch since pinctrl and gpio don't seem to be
  ready for removable drivers
- documentation and machine support are merged already
  
Changes since v1:
- Update sunxi README in Documentation
- Add the multiple parents gates and use them for bus-gates instead of
  ahb1, ahb2, apb1 and apb2 gates
- Merge the pll8 clock with sun6i pll6
- Merge the ahb12, apb1 and apb2 resets to bus-resets with own compatible
- Add sun6i_timer_init to sun8i machine
- Remove the single SoC names from machine definition, its sun8i family
- Make the pinctrl driver tristate and put its Kconfig entry in the right order
- Rename pinctrl "scr" to "sim" and clock "sim" to "scr" to match user manual
- Remove the address paragraph from GPL in dts and dtsi
- Some style cleanup and line wrapping in dtsi
- Add ARM architected timers
- dmaengine isn't included anymore, it is merged already

Best Regards,
Jens


Jens Kuske (4):
  clk: sunxi: Add H3 clocks support
  pinctrl: sunxi: Add H3 PIO controller support
  ARM: dts: sunxi: Add Allwinner H3 DTSI
  ARM: dts: sun8i: Add Orange Pi Plus support

 Documentation/devicetree/bindings/clock/sunxi.txt  |   2 +
 .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt   |   1 +
 arch/arm/boot/dts/Makefile                         |   3 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts       |  77 +++
 arch/arm/boot/dts/sun8i-h3.dtsi                    | 497 ++++++++++++++++++++
 drivers/clk/sunxi/Makefile                         |   1 +
 drivers/clk/sunxi/clk-sun8i-bus-gates.c            | 112 +++++
 drivers/clk/sunxi/clk-sunxi.c                      |   6 +
 drivers/pinctrl/sunxi/Kconfig                      |   4 +
 drivers/pinctrl/sunxi/Makefile                     |   1 +
 drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c           | 515 +++++++++++++++++++++
 11 files changed, 1218 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
 create mode 100644 arch/arm/boot/dts/sun8i-h3.dtsi
 create mode 100644 drivers/clk/sunxi/clk-sun8i-bus-gates.c
 create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c

-- 
2.6.3

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