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Message-ID: <tip-e0fbac1cd49c5ca6cb6a0aa918d0943ce95d906c@git.kernel.org>
Date:	Sun, 6 Dec 2015 05:16:29 -0800
From:	tip-bot for Yuanfang Chen <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	peterz@...radead.org, torvalds@...ux-foundation.org,
	tglx@...utronix.de, mingo@...nel.org, linux-kernel@...r.kernel.org,
	acme@...hat.com, eranian@...gle.com, jolsa@...hat.com,
	hpa@...or.com, ak@...ux.intel.com, cheny@...l.edu,
	vincent.weaver@...ne.edu
Subject: [tip:perf/core] perf/x86/intel:
  Make L1D_PEND_MISS.FB_FULL not constrained on Haswell

Commit-ID:  e0fbac1cd49c5ca6cb6a0aa918d0943ce95d906c
Gitweb:     http://git.kernel.org/tip/e0fbac1cd49c5ca6cb6a0aa918d0943ce95d906c
Author:     Yuanfang Chen <cheny@...l.edu>
AuthorDate: Tue, 24 Nov 2015 12:05:01 -0500
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Sun, 6 Dec 2015 12:54:48 +0100

perf/x86/intel: Make L1D_PEND_MISS.FB_FULL not constrained on Haswell

There was a mistake in the Haswell constraints table.

Signed-off-by: Yuanfang Chen <cheny@...l.edu>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Reviewed-by: Andi Kleen <ak@...ux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Vince Weaver <vincent.weaver@...ne.edu>
Link: http://lkml.kernel.org/r/1448384701-9110-1-git-send-email-cheny@udel.edu
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/kernel/cpu/perf_event_intel.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index f63360b..e2a4300 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -232,7 +232,7 @@ static struct event_constraint intel_hsw_event_constraints[] = {
 	FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
 	FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
 	FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
-	INTEL_EVENT_CONSTRAINT(0x48, 0x4), /* L1D_PEND_MISS.* */
+	INTEL_UEVENT_CONSTRAINT(0x148, 0x4),	/* L1D_PEND_MISS.PENDING */
 	INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */
 	INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.LOAD_LATENCY */
 	/* CYCLE_ACTIVITY.CYCLES_L1D_PENDING */
--
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