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Message-ID: <20151208081117.GL27957@lukather>
Date: Tue, 8 Dec 2015 09:11:17 +0100
From: Maxime Ripard <maxime.ripard@...e-electrons.com>
To: Jens Kuske <jenskuske@...il.com>
Cc: Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Linus Walleij <linus.walleij@...aro.org>,
Hans de Goede <hdegoede@...hat.com>,
Reinder de Haan <patchesrdh@...as.com>,
Vishnu Patekar <vishnupatekar0510@...il.com>,
Emilio López <emilio@...pez.com.ar>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com
Subject: Re: [PATCH v5 1/4] clk: sunxi: Add H3 clocks support
Hi Jens,
On Fri, Dec 04, 2015 at 10:24:40PM +0100, Jens Kuske wrote:
> The H3 clock control unit is similar to the those of other sun8i family
> members like the A23.
>
> It adds a new bus gates clock similar to the simple gates, but with a
> different parent clock for each single gate.
> Some of the gates use the new AHB2 clock as parent, whose clock source
> is muxable between AHB1 and PLL6/2. The documentation isn't totally clear
> about which devices belong to AHB2 now, especially USB EHIC/OHIC, so it
> is mostly based on Allwinner kernel source code.
>
> Signed-off-by: Jens Kuske <jenskuske@...il.com>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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