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Message-ID: <5668AB4F.7030100@simon.arlott.org.uk>
Date:	Wed, 9 Dec 2015 22:29:35 +0000
From:	Simon Arlott <simon@...e.lp0.eu>
To:	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Sebastian Reichel <sre@...nel.org>,
	Dmitry Eremin-Solenikov <dbaryshkov@...il.com>,
	David Woodhouse <dwmw2@...radead.org>,
	Kevin Cernekee <cernekee@...il.com>,
	Florian Fainelli <f.fainelli@...il.com>
Cc:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Jonas Gorski <jogo@...nwrt.org>, linux-pm@...r.kernel.org,
	Mark Brown <broonie@...nel.org>,
	MIPS Mailing List <linux-mips@...ux-mips.org>,
	bcm-kernel-feedback-list <bcm-kernel-feedback-list@...adcom.com>
Subject: [PATCH linux-next 1/2] power: Add brcm,bcm6358-power-controller
 device tree binding

The BCM6358 contains power domains controlled with a register. Power
domains are indexed by bits in the register. Power domain bits can be
interleaved with other status bits and clocks in the same register.

Newer SoCs with dedicated power domain registers are active low.

Signed-off-by: Simon Arlott <simon@...e.lp0.eu>
---
 .../power/brcm,bcm6358-power-controller.txt        | 53 ++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/brcm,bcm6358-power-controller.txt

diff --git a/Documentation/devicetree/bindings/power/brcm,bcm6358-power-controller.txt b/Documentation/devicetree/bindings/power/brcm,bcm6358-power-controller.txt
new file mode 100644
index 0000000..556c323
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/brcm,bcm6358-power-controller.txt
@@ -0,0 +1,53 @@
+Broadcom BCM6358 Power domain controller
+
+This binding uses the power domain bindings:
+        Documentation/devicetree/bindings/power/power_domain.txt
+
+The BCM6358 contains power domains controlled with a register. Power
+domains are indexed by bits in the register. Power domain bits can be
+interleaved with other status bits and clocks in the same register.
+
+Newer SoCs with dedicated power domain registers are active low.
+
+Required properties:
+- compatible:           Should be "brcm,bcm<soc>-power-controller", "brcm,bcm6358-power-controller"
+- #power-domain-cells:  Should be <1>.
+- regmap:               The register map phandle
+- offset:               Offset in the register map for the power domain register (in bytes)
+- power-domain-indices: The bits in the register used for power domains.
+- power-domain-names:   Should be a list of strings of power domain names
+                        indexed by the power domain indices.
+
+Optional properties:
+- active-low:           Specify that the bits are active low.
+
+Example:
+
+misc_iddq_ctrl: power-controller {
+	compatible = "brcm,bcm63168-power-controller", "brcm,bcm6358-power-controller";
+	regmap = <&misc>;
+	offset = <0x4c>;
+
+	#power-domain-cells = <1>;
+	power-domain-indices =
+	                <0>,         <1>,      <2>,    <3>,         <4>,
+	                <5>,         <6>,      <7>,    <8>,         <9>,
+	                <10>,        <11>,     <12>,   <13>,        <17>,
+	                <18>;
+	power-domain-names =
+	                "sar",       "ipsec",  "mips", "dect",      "usbh",
+	                "usbd",      "robosw", "pcm",  "periph",    "vdsl_phy",
+	                "vdsl_mips", "fap",    "pcie", "wlan_pads", "gphy",
+	                "gmac";
+	active-low;
+};
+
+periph_iddq: power-controller {
+	compatible = "brcm,bcm6368-power-controller", "brcm,bcm6358-power-controller";
+	regmap = <&periph_cntl>;
+	offset = <0x4>;
+
+	#power-domain-cells = <1>;
+	power-domain-indices = <19>;
+	power-domain-names = "usbh";
+};
-- 
2.1.4

-- 
Simon Arlott
--
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