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Message-ID: <5669236D.30805@xilinx.com>
Date:	Thu, 10 Dec 2015 08:02:05 +0100
From:	Michal Simek <michal.simek@...inx.com>
To:	Bjorn Helgaas <helgaas@...nel.org>,
	Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
CC:	<robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<sorenb@...inx.com>, <bhelgaas@...gle.com>, <arnd@...db.de>,
	<tinamdar@....com>, <treding@...dia.com>, <rjui@...adcom.com>,
	<Minghuan.Lian@...escale.com>, <m-karicheri2@...com>,
	<hauke@...ke-m.de>, <marc.zyngier@....com>, <dhdang@....com>,
	<sbranden@...adcom.com>, <devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>,
	Bharat Kumar Gogada <bharatku@...inx.com>,
	"Ravi Kiran Gummaluri" <rgummal@...inx.com>,
	Michal Simek <michal.simek@...inx.com>,
	Paul Burton <paul.burton@...tec.com>,
	Thierry Reding <thierry.reding@...il.com>,
	Stephen Warren <swarren@...dotorg.org>,
	"Alexandre Courbot" <gnurou@...il.com>
Subject: Re: [PATCH v11] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL
 PCIe Host Controller

Hi Bjorn,

On 10.12.2015 00:19, Bjorn Helgaas wrote:
> [+cc Michal, Paul, Thierry, Stephen, Alexandre (see irq_dispose_mapping questions below)]
> 
> On Sun, Nov 29, 2015 at 05:33:53PM +0530, Bharat Kumar Gogada wrote:
>> Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
>>
>> Signed-off-by: Bharat Kumar Gogada <bharatku@...inx.com>
>> Signed-off-by: Ravi Kiran Gummaluri <rgummal@...inx.com>
>> Acked-by: Rob Herring <robh@...nel.org>
> 
> This needs either a MAINTAINERS update or an ack from Michal (whose
> MAINTAINERS entry matches anything containing "xilinx").

We have done it in this way because driver owners are changing time to
time and my entry cover it that I can pass it to appropriate person who
is responsible for it.

For this Maintainers part here is my:
Acked-by: Michal Simek <michal.simek@...inx.com>

Thanks,
Michal
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