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Message-ID: <1449785308-19546-1-git-send-email-rklein@nvidia.com>
Date:	Thu, 10 Dec 2015 17:08:19 -0500
From:	Rhyland Klein <rklein@...dia.com>
To:	Peter De Schrijver <pdeschrijver@...dia.com>,
	Stephen Warren <swarren@...dotorg.org>,
	Thierry Reding <thierry.reding@...il.com>
CC:	Michael Turquette <mturquette@...libre.com>,
	linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Andrew Bresticker <abrestic@...omium.org>,
	Rhyland Klein <rklein@...dia.com>
Subject: [PATCH 0/9] Tegra CLK Fixes

This patch set fixes some issues found with the Tegra CLK drivers
in testing. There are also a few patches which clean up the code
and fix some naming issues.

Andrew Bresticker (1):
  clk: tegra: pll: Fix potential sleeping-while-atomic

Mark Kuo (2):
  clk: tegra: pll: Do not disable PLLE when under HW control
  clk: tegra: pll: Fix PLLE SS config

Rhyland Klein (6):
  clk: tegra: Fix divider on VI_I2C
  clk: tegra210: Remove improper flags for lock_enable
  clk: tegra210: Fix naming of MISC registers
  clk: tegra: Fix the misnaming of nvenc from msenc
  clk: tegra210: fix pllx dyn step calculation
  clk: tegra210: Initialize PLL_D2 to a sane rate

 drivers/clk/tegra/clk-pll.c          | 50 +++++++++++++--------
 drivers/clk/tegra/clk-tegra-periph.c |  4 +-
 drivers/clk/tegra/clk-tegra210.c     | 87 +++++++++++++++---------------------
 3 files changed, 71 insertions(+), 70 deletions(-)

-- 
1.9.1

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