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Message-id: <566A752C.80601@samsung.com>
Date:	Fri, 11 Dec 2015 16:03:08 +0900
From:	Krzysztof Kozlowski <k.kozlowski@...sung.com>
To:	Chanwoo Choi <cw00.choi@...sung.com>, myungjoo.ham@...sung.com,
	kgene@...nel.org
Cc:	kyungmin.park@...sung.com, robh+dt@...nel.org, pawel.moll@....com,
	mark.rutland@....com, ijc+devicetree@...lion.org.uk,
	galak@...eaurora.org, linux@....linux.org.uk,
	tjakobi@...h.uni-bielefeld.de, linux.amoon@...il.com,
	linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
	linux-samsung-soc@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v3 15/20] ARM: dts: Add bus nodes using VDD_INT for
 Exynos4x12

On 11.12.2015 14:07, Chanwoo Choi wrote:
> This patch adds the bus noes using VDD_INT for Exynos4x12 SoC.
> Exynos4x12 has the following AXI buses to translate data between
> DRAM and sub-blocks.
> 
> Following list specifies the detailed relation between DRAM and sub-blocks:
> - ACLK100 clock for PERIL/PERIR/MFC(PCLK)
> - ACLK160 clock for CAM/TV/LCD
> : The minimum clock of ACLK160 should be over 160MHz.
>   When drop the clock under 160MHz, show the broken image.
> - ACLK133 clock for FSYS
> - GDL clock for LEFTBUS
> - GDR clock for RIGHTBUS
> - SCLK_MFC clock for MFC
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
> [linux.amoon: Tested on Odroid U3]
> Tested-by: Anand Moon <linux.amoon@...il.com>
> ---
>  arch/arm/boot/dts/exynos4x12.dtsi | 106 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 106 insertions(+)
> 

Reviewed-by: Krzysztof Kozlowski <k.kozlowski@...sung.com>

Best regards,
Krzysztof



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