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Message-ID: <3368238.OTPIyEf9PI@diego>
Date:	Mon, 14 Dec 2015 14:06:06 +0100
From:	Heiko Stübner <heiko@...ech.de>
To:	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc:	Caesar Wang <wxt@...k-chips.com>,
	linux-rockchip@...ts.infradead.org,
	Russell King <linux@....linux.org.uk>,
	devicetree@...r.kernel.org, Kumar Gala <galak@...eaurora.org>,
	linux-kernel@...r.kernel.org,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 3/4] ARM: dts: rockchip: add eFuse node for rk3066a SoCs

Hi srini,

Am Montag, 14. Dezember 2015, 09:57:02 schrieb Srinivas Kandagatla:
> Heiko,
> 
> Can you take the DT patches in this series via your tree.
> 
> I picked up nvmem patches from this series.

yep that was my plan ... just needed to wait for the nvmem parts to be picked.


Thanks for the notifying me :-)
Heiko


> 
> thanks,
> srini
> 
> On 11/11/15 07:34, Caesar Wang wrote:
> > This patch add the eFuse dt node for rk3066a SoCs.
> > 
> > Signed-off-by: Caesar Wang <wxt@...k-chips.com>
> > ---
> > 
> >   arch/arm/boot/dts/rk3066a.dtsi | 13 +++++++++++++
> >   1 file changed, 13 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/rk3066a.dtsi
> > b/arch/arm/boot/dts/rk3066a.dtsi index 946f187..f61bb8a 100644
> > --- a/arch/arm/boot/dts/rk3066a.dtsi
> > +++ b/arch/arm/boot/dts/rk3066a.dtsi
> > @@ -153,6 +153,19 @@
> > 
> >   		clock-names = "timer", "pclk";
> >   	
> >   	};
> > 
> > +	efuse: efuse@...10000 {
> > +		compatible = "rockchip,rockchip-efuse";
> > +		reg = <0x20010000 0x4000>;
> > +		#address-cells = <1>;
> > +		#size-cells = <1>;
> > +		clocks = <&cru PCLK_EFUSE>;
> > +		clock-names = "pclk_efuse";
> > +
> > +		cpu_leakage: cpu_leakage {
> > +			reg = <0x17 0x1>;
> > +		};
> > +	};
> > +
> > 
> >   	timer@...38000 {
> >   	
> >   		compatible = "snps,dw-apb-timer-osc";
> >   		reg = <0x20038000 0x100>;

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