linux-kernel - Re: [PATCH] ARM64: ZynqMP: DT: Fix GIC's 'reg' property

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <566EF5CC.4070000@arm.com>
Date:	Mon, 14 Dec 2015 17:01:00 +0000
From:	Marc Zyngier <marc.zyngier@....com>
To:	Mark Rutland <mark.rutland@....com>,
	Soren Brinkmann <soren.brinkmann@...inx.com>
CC:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Michal Simek <michal.simek@...inx.com>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org,
	Alistair Francis <alistair.francis@...inx.com>
Subject: Re: [PATCH] ARM64: ZynqMP: DT: Fix GIC's 'reg' property

Mark,

On 14/12/15 16:46, Mark Rutland wrote:
> On Mon, Dec 14, 2015 at 08:31:40AM -0800, Soren Brinkmann wrote:
>> Signed-off-by: Soren Brinkmann <soren.brinkmann@...inx.com>
>> ---
>>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> index 857eda5c7217..b5d1facadf16 100644
>> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> @@ -80,10 +80,10 @@
>>  		gic: interrupt-controller@...10000 {
>>  			compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>  			#interrupt-cells = <3>;
>> -			reg = <0x0 0xf9010000 0x10000>,
>> -			      <0x0 0xf902f000 0x2000>,
>> +			reg = <0x0 0xf9010000 0x1000>,
>> +			      <0x0 0xf9020000 0x20000>,
>>  			      <0x0 0xf9040000 0x20000>,
>> -			      <0x0 0xf906f000 0x2000>;
>> +			      <0x0 0xf9060000 0x20000>;
> 
> I'm confused. These sizes don't look right for GIC-400. Is this a custom
> GIC?

Probably an implementation that obey the SBSA requirement of aliasing
the first 4kB of the CPU interface on a 64kB page, and the second one on
the following 64kB page. See the APM system for an example of such a
thing. I'm more concerned about the GICH region (3rd one), which has no
reason to be bigger than 4kB.

> Did this ever work wit hteh old offsets and sizes?

It probably dies when trying to use EOImode==1.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/