| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20151214190550.5C2B0E4B@viggo.jf.intel.com> Date: Mon, 14 Dec 2015 11:05:50 -0800 From: Dave Hansen <dave@...1.net> To: linux-kernel@...r.kernel.org Cc: linux-mm@...ck.org, x86@...nel.org, Dave Hansen <dave@...1.net>, dave.hansen@...ux.intel.com Subject: [PATCH 05/32] x86, pkeys: define new CR4 bit From: Dave Hansen <dave.hansen@...ux.intel.com> There is a new bit in CR4 for enabling protection keys. We will actually enable it later in the series. Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com> Reviewed-by: Thomas Gleixner <tglx@...utronix.de> --- b/arch/x86/include/uapi/asm/processor-flags.h | 2 ++ 1 file changed, 2 insertions(+) diff -puN arch/x86/include/uapi/asm/processor-flags.h~pkeys-02-cr4 arch/x86/include/uapi/asm/processor-flags.h --- a/arch/x86/include/uapi/asm/processor-flags.h~pkeys-02-cr4 2015-12-14 10:42:40.978721262 -0800 +++ b/arch/x86/include/uapi/asm/processor-flags.h 2015-12-14 10:42:40.981721397 -0800 @@ -118,6 +118,8 @@ #define X86_CR4_SMEP _BITUL(X86_CR4_SMEP_BIT) #define X86_CR4_SMAP_BIT 21 /* enable SMAP support */ #define X86_CR4_SMAP _BITUL(X86_CR4_SMAP_BIT) +#define X86_CR4_PKE_BIT 22 /* enable Protection Keys support */ +#define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT) /* * x86-64 Task Priority Register, CR8 _ -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists